CH349705A - Halbleiteranordnung und Verfahren zu ihrer Herstellung - Google Patents

Halbleiteranordnung und Verfahren zu ihrer Herstellung

Info

Publication number
CH349705A
CH349705A CH349705DA CH349705A CH 349705 A CH349705 A CH 349705A CH 349705D A CH349705D A CH 349705DA CH 349705 A CH349705 A CH 349705A
Authority
CH
Switzerland
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Application number
Other languages
English (en)
Inventor
Heinz Dr Dorendorf
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH349705A publication Critical patent/CH349705A/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/06—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion material in the gaseous state
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
CH349705D 1956-07-23 1957-07-17 Halbleiteranordnung und Verfahren zu ihrer Herstellung CH349705A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES49673A DE1170555B (de) 1956-07-23 1956-07-23 Verfahren zum Herstellen eines Halbleiter-bauelements mit drei Zonen abwechselnd entgegengesetzten Leitungstyps

Publications (1)

Publication Number Publication Date
CH349705A true CH349705A (de) 1960-10-31

Family

ID=7487407

Family Applications (1)

Application Number Title Priority Date Filing Date
CH349705D CH349705A (de) 1956-07-23 1957-07-17 Halbleiteranordnung und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
US (1) US2945286A (de)
CH (1) CH349705A (de)
DE (1) DE1170555B (de)
FR (1) FR1180762A (de)
GB (1) GB836066A (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2978617A (en) * 1957-07-10 1961-04-04 Siemens Ag Diffusion transistor
US3037155A (en) * 1957-10-12 1962-05-29 Bosch Gmbh Robert Semi-conductor device
US3108209A (en) * 1959-05-21 1963-10-22 Motorola Inc Transistor device and method of manufacture
DE1208413B (de) * 1959-11-21 1966-01-05 Siemens Ag Verfahren zum Herstellen von flaechenhaften pn-UEbergaengen an Halbleiterbauelementen
US3101523A (en) * 1960-03-08 1963-08-27 Texas Instruments Inc Method for attaching leads to small semiconductor surfaces
US3254389A (en) * 1961-12-05 1966-06-07 Hughes Aircraft Co Method of making a ceramic supported semiconductor device
US3296040A (en) * 1962-08-17 1967-01-03 Fairchild Camera Instr Co Epitaxially growing layers of semiconductor through openings in oxide mask
US3242551A (en) * 1963-06-04 1966-03-29 Gen Electric Semiconductor switch
GB1158585A (en) * 1965-12-06 1969-07-16 Lucas Industries Ltd Gate Controlled Switches
GB8705699D0 (en) * 1987-03-11 1987-04-15 Shell Int Research Carbonylation of olefinically unsaturated compounds
US5014111A (en) * 1987-12-08 1991-05-07 Matsushita Electric Industrial Co., Ltd. Electrical contact bump and a package provided with the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE489418A (de) * 1948-06-26
US2666814A (en) * 1949-04-27 1954-01-19 Bell Telephone Labor Inc Semiconductor translating device
AT183111B (de) * 1953-05-07 1955-09-10 Philips Nv Elektrodensystem, insbesondere Transistor und Verfahren zur Herstellung dieses Systems
GB753133A (en) * 1953-07-22 1956-07-18 Standard Telephones Cables Ltd Improvements in or relating to electric semi-conducting devices
US2848665A (en) * 1953-12-30 1958-08-19 Ibm Point contact transistor and method of making same
US2821493A (en) * 1954-03-18 1958-01-28 Hughes Aircraft Co Fused junction transistors with regrown base regions
BE537841A (de) * 1954-05-03 1900-01-01
US2813233A (en) * 1954-07-01 1957-11-12 Bell Telephone Labor Inc Semiconductive device
US2829075A (en) * 1954-09-09 1958-04-01 Rca Corp Field controlled semiconductor devices and methods of making them
NL107344C (de) * 1955-03-23

Also Published As

Publication number Publication date
GB836066A (en) 1960-06-01
FR1180762A (fr) 1959-06-09
DE1170555B (de) 1964-05-21
US2945286A (en) 1960-07-19

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