CH253109A - Verfahren zur Herstellung einer Sperrschichtzelle und nach diesem Verfahren erhaltene Sperrschichtzelle. - Google Patents

Verfahren zur Herstellung einer Sperrschichtzelle und nach diesem Verfahren erhaltene Sperrschichtzelle.

Info

Publication number
CH253109A
CH253109A CH253109DA CH253109A CH 253109 A CH253109 A CH 253109A CH 253109D A CH253109D A CH 253109DA CH 253109 A CH253109 A CH 253109A
Authority
CH
Switzerland
Prior art keywords
barrier cell
manufacturing
barrier
cell obtained
cell
Prior art date
Application number
Other languages
German (de)
English (en)
Inventor
Gloeilampenfabrieken N Philips
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH253109A publication Critical patent/CH253109A/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
    • H01L21/10—Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
    • H01L21/105—Treatment of the surface of the selenium or tellurium layer after having been made conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02425—Conductive materials, e.g. metallic silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/02444—Carbon, e.g. diamond-like carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
    • H01L21/10—Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
    • H01L21/101—Application of the selenium or tellurium to the foundation plate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
    • H01L21/10—Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
    • H01L21/108—Provision of discrete insulating layers, i.e. non-genetic barrier layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biotechnology (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Photoreceptors In Electrophotography (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrolytic Production Of Metals (AREA)
  • Electrodes For Compound Or Non-Metal Manufacture (AREA)
CH253109D 1944-08-08 1946-08-30 Verfahren zur Herstellung einer Sperrschichtzelle und nach diesem Verfahren erhaltene Sperrschichtzelle. CH253109A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL253109X 1944-08-08

Publications (1)

Publication Number Publication Date
CH253109A true CH253109A (de) 1948-02-15

Family

ID=19781189

Family Applications (1)

Application Number Title Priority Date Filing Date
CH253109D CH253109A (de) 1944-08-08 1946-08-30 Verfahren zur Herstellung einer Sperrschichtzelle und nach diesem Verfahren erhaltene Sperrschichtzelle.

Country Status (7)

Country Link
US (1) US2468527A (fr)
BE (1) BE467879A (fr)
CH (1) CH253109A (fr)
DE (1) DE915593C (fr)
FR (1) FR942904A (fr)
GB (1) GB637736A (fr)
NL (2) NL118416B (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE516590A (fr) * 1951-10-29
DE1090768B (de) * 1957-05-11 1960-10-13 Licentia Gmbh Verfahren zur Herstellung von Selentrockengleichrichtern
US2892136A (en) * 1957-09-09 1959-06-23 Int Rectifier Corp Rectifier with multiple barrier layers
NL275667A (fr) * 1961-04-28

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT153134B (de) * 1936-06-13 1938-04-11 Aeg Verfahren zur Herstellung von Trockenplattengleichrichtern.
US2221596A (en) * 1938-01-22 1940-11-12 Fides Gmbh Method of manufacturing dry rectifiers
BE434337A (fr) * 1938-06-07
NL95164C (fr) * 1938-09-09
DE742762C (de) * 1939-03-15 1943-12-10 Philips Patentverwaltung Verfahren zur Herstellung eines Sperrschichtelektrodensystems mit einer Selenelektrode

Also Published As

Publication number Publication date
NL118416B (fr) 1900-01-01
BE467879A (fr) 1900-01-01
GB637736A (en) 1950-05-24
FR942904A (fr) 1949-02-22
NL66146C (fr) 1900-01-01
DE915593C (de) 1954-07-26
US2468527A (en) 1949-04-26

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