CA924026A - Method for manufacturing a semiconductor integrated circuit isolated by dielectric material - Google Patents

Method for manufacturing a semiconductor integrated circuit isolated by dielectric material

Info

Publication number
CA924026A
CA924026A CA124253A CA124253A CA924026A CA 924026 A CA924026 A CA 924026A CA 124253 A CA124253 A CA 124253A CA 124253 A CA124253 A CA 124253A CA 924026 A CA924026 A CA 924026A
Authority
CA
Canada
Prior art keywords
manufacturing
integrated circuit
dielectric material
semiconductor integrated
circuit isolated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA124253A
Other languages
English (en)
Other versions
CA124253S (en
Inventor
Yasui Toshiko
Ohashi Taizo
Muraoka Hisashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP8658670A external-priority patent/JPS4945035B1/ja
Priority claimed from JP4925071A external-priority patent/JPS5521461B1/ja
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Application granted granted Critical
Publication of CA924026A publication Critical patent/CA924026A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/026Deposition thru hole in mask
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/051Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Element Separation (AREA)
CA124253A 1970-10-05 1971-10-04 Method for manufacturing a semiconductor integrated circuit isolated by dielectric material Expired CA924026A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8658670A JPS4945035B1 (ja) 1970-10-05 1970-10-05
JP4925071A JPS5521461B1 (ja) 1971-07-06 1971-07-06

Publications (1)

Publication Number Publication Date
CA924026A true CA924026A (en) 1973-04-03

Family

ID=26389625

Family Applications (1)

Application Number Title Priority Date Filing Date
CA124253A Expired CA924026A (en) 1970-10-05 1971-10-04 Method for manufacturing a semiconductor integrated circuit isolated by dielectric material

Country Status (6)

Country Link
US (1) US3756877A (ja)
CA (1) CA924026A (ja)
DE (1) DE2149566C3 (ja)
FR (1) FR2110235B1 (ja)
GB (1) GB1345752A (ja)
NL (1) NL169802C (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2294549A1 (fr) * 1974-12-09 1976-07-09 Radiotechnique Compelec Procede de realisation de dispositifs optoelectroniques
US3997381A (en) * 1975-01-10 1976-12-14 Intel Corporation Method of manufacture of an epitaxial semiconductor layer on an insulating substrate
JPS5215262A (en) * 1975-07-28 1977-02-04 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacturing method
DE69232347T2 (de) * 1991-09-27 2002-07-11 Canon Kk Verfahren zur Behandlung eines Substrats aus Silizium
DE69233314T2 (de) * 1991-10-11 2005-03-24 Canon K.K. Verfahren zur Herstellung von Halbleiter-Produkten
US5843322A (en) * 1996-12-23 1998-12-01 Memc Electronic Materials, Inc. Process for etching N, P, N+ and P+ type slugs and wafers
CN111019659B (zh) * 2019-12-06 2021-06-08 湖北兴福电子材料有限公司 一种选择性硅蚀刻液

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3372063A (en) * 1964-12-22 1968-03-05 Hitachi Ltd Method for manufacturing at least one electrically isolated region of a semiconductive material
FR1483068A (fr) * 1965-05-10 1967-06-02 Ibm Montage de dispositif à semi-conducteur et procédé de fabrication

Also Published As

Publication number Publication date
GB1345752A (en) 1974-02-06
FR2110235B1 (ja) 1977-03-18
FR2110235A1 (ja) 1972-06-02
DE2149566C3 (de) 1981-07-23
DE2149566A1 (de) 1972-04-06
NL169802C (nl) 1982-08-16
NL169802B (nl) 1982-03-16
US3756877A (en) 1973-09-04
NL7113629A (ja) 1972-04-07
DE2149566B2 (de) 1980-11-27

Similar Documents

Publication Publication Date Title
CA966585A (en) Semiconductor integrated circuit isolated through dielectric material and a method for manufacturing the same
CA997482A (en) Integrated circuit fabrication process
CA981809A (en) Method employing precision stamping for fabricating the wafers of a multiwafer electrical circuit structure
CA984969A (en) Circuit for improving operation of semiconductor memory
CA924026A (en) Method for manufacturing a semiconductor integrated circuit isolated by dielectric material
CA933676A (en) Method of manufacturing a semiconductor device
CA922026A (en) Method of making electrical contacts on the surface of a semiconductor device
AU455243B1 (en) Method of manufacturing a semiconductor device
CA998778A (en) Semiconductor manufacturing process
CA969839A (en) Semiconductor rod manufacturing method
CA920034A (en) Method of manufacturing semiconductor compounds
CA903385A (en) Method for manufacturing a semiconductor integrated circuit isolated by dielectric material
CA1004780A (en) Semiconductor integrated circuit mis structure
AU482820B2 (en) A semiconductor integrated circuit isolated through dielectric material anda method for manufacturing thesame
CA994003A (en) Semiconductor integrated circuit arrangement
CA918304A (en) Method of manufacturing a semiconductor device
CA933677A (en) Method of manufacturing a semiconductor device
CA893924A (en) Methods for forming circuit components within a substrate and semiconductor substrate
CA859118A (en) Electrolytic etching method for manufacturing semiconductor devices
CA835597A (en) Method for fabricating integrated circuits
CA882946A (en) Method for manufacturing semiconductor device
CA906104A (en) Method for making semiconductor devices
AU456634B2 (en) A method of manufacturing semiconductor devices
CA800199A (en) Method for manufacturing semiconductor devices
AU459262B2 (en) Method of manufacturing a semiconductor device