CA3015929A1 - Chute de puissance et reveil d'horloge geres par materiel pour des unites de gestion de memoire et reseaux de memoire virtuelle distribues - Google Patents
Chute de puissance et reveil d'horloge geres par materiel pour des unites de gestion de memoire et reseaux de memoire virtuelle distribues Download PDFInfo
- Publication number
- CA3015929A1 CA3015929A1 CA3015929A CA3015929A CA3015929A1 CA 3015929 A1 CA3015929 A1 CA 3015929A1 CA 3015929 A CA3015929 A CA 3015929A CA 3015929 A CA3015929 A CA 3015929A CA 3015929 A1 CA3015929 A1 CA 3015929A1
- Authority
- CA
- Canada
- Prior art keywords
- dvm
- target
- network
- targets
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3275—Power saving in memory, e.g. RAM, cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1028—Power efficiency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/657—Virtual address space management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/68—Details of translation look-aside buffer [TLB]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/68—Details of translation look-aside buffer [TLB]
- G06F2212/683—Invalidation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Power Sources (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
L'invention concerne des procédés et des systèmes de gestion matérielle complète de domaines de puissance et d'horloge associés à un réseau de mémoire virtuelle distribuée (DVM). Un aspect comprend la transmission, depuis un initiateur de DVM vers un réseau de DVM, d'une opération de DVM, la diffusion, par le réseau de DVM à une pluralité de cibles de DVM, de l'opération de DVM et, en fonction de la diffusion de l'opération de DVM à la pluralité de cibles de DVM par le réseau de DVM, la réalisation d'une ou plusieurs optimisations matérielles comprenant : la mise sous tension d'un domaine d'horloge couplé au réseau de DVM ou à une cible de DVM de la pluralité de cibles de DVM constituant une cible de l'opération de DVM, l'augmentation d'une fréquence du domaine d'horloge, la mise sous tension d'un domaine de puissance couplé à la cible de DVM en fonction de la mise hors tension du domaine de puissance, ou l'achèvement de l'opération de DVM vers la cible de DVM en fonction de la mise hors tension de la cible de DVM.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/086,054 | 2016-03-31 | ||
US15/086,054 US10386904B2 (en) | 2016-03-31 | 2016-03-31 | Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks |
PCT/US2017/022158 WO2017172342A1 (fr) | 2016-03-31 | 2017-03-13 | Chute de puissance et réveil d'horloge gérés par matériel pour des unités de gestion de mémoire et réseaux de mémoire virtuelle distribués |
Publications (1)
Publication Number | Publication Date |
---|---|
CA3015929A1 true CA3015929A1 (fr) | 2017-10-05 |
Family
ID=58448615
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA3015929A Abandoned CA3015929A1 (fr) | 2016-03-31 | 2017-03-13 | Chute de puissance et reveil d'horloge geres par materiel pour des unites de gestion de memoire et reseaux de memoire virtuelle distribues |
Country Status (9)
Country | Link |
---|---|
US (2) | US10386904B2 (fr) |
EP (1) | EP3436895B1 (fr) |
JP (1) | JP6640374B2 (fr) |
KR (1) | KR102048399B1 (fr) |
CN (1) | CN108780350B (fr) |
BR (1) | BR112018070131A2 (fr) |
CA (1) | CA3015929A1 (fr) |
TW (1) | TWI698746B (fr) |
WO (1) | WO2017172342A1 (fr) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9910799B2 (en) * | 2016-04-04 | 2018-03-06 | Qualcomm Incorporated | Interconnect distributed virtual memory (DVM) message preemptive responding |
US10719452B2 (en) * | 2018-06-22 | 2020-07-21 | Xilinx, Inc. | Hardware-based virtual-to-physical address translation for programmable logic masters in a system on chip |
US10983851B1 (en) * | 2019-12-04 | 2021-04-20 | Cirrus Logic, Inc. | Protecting against memory corruption and system freeze during power state transitions in a multi-power domain system |
CN116830093A (zh) * | 2021-04-30 | 2023-09-29 | 华为技术有限公司 | 虚拟化系统以及虚拟化系统中内存一致性维护方法 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3696901B2 (ja) * | 1994-07-19 | 2005-09-21 | キヤノン株式会社 | 負荷分散方法 |
US5884100A (en) | 1996-06-06 | 1999-03-16 | Sun Microsystems, Inc. | Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor |
US6889254B1 (en) * | 1999-03-30 | 2005-05-03 | International Business Machines Corporation | Scalable merge technique for information retrieval across a distributed network |
FR2808904A1 (fr) * | 2000-05-12 | 2001-11-16 | Ibm | Systeme d'acces a des memoires redondantes |
US6990594B2 (en) * | 2001-05-02 | 2006-01-24 | Portalplayer, Inc. | Dynamic power management of devices in computer system by selecting clock generator output based on a current state and programmable policies |
US7725742B2 (en) * | 2006-08-15 | 2010-05-25 | Mitac International Corp. | Remote monitor module for power initialization of computer system |
US7853928B2 (en) * | 2007-04-19 | 2010-12-14 | International Business Machines Corporation | Creating a physical trace from a virtual trace |
US8775839B2 (en) | 2008-02-08 | 2014-07-08 | Texas Instruments Incorporated | Global hardware supervised power transition management circuits, processes and systems |
US8732700B2 (en) * | 2008-12-18 | 2014-05-20 | Vmware, Inc. | Virtualization system with a remote proxy |
US8244978B2 (en) | 2010-02-17 | 2012-08-14 | Advanced Micro Devices, Inc. | IOMMU architected TLB support |
CN103262054B (zh) * | 2010-12-13 | 2015-11-25 | 桑迪士克科技股份有限公司 | 用于自动提交存储器的装置、系统和方法 |
US9177615B2 (en) * | 2011-07-06 | 2015-11-03 | Qualcomm Technologies, Inc. | Power disconnect unit for use in data transport topology of network on chip design having asynchronous clock domain adapter sender and receiver each at a separate power domain |
US9916257B2 (en) | 2011-07-26 | 2018-03-13 | Intel Corporation | Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory |
US9298621B2 (en) | 2011-11-04 | 2016-03-29 | Hewlett Packard Enterprise Development Lp | Managing chip multi-processors through virtual domains |
US9378150B2 (en) | 2012-02-28 | 2016-06-28 | Apple Inc. | Memory management unit with prefetch ability |
DE112013006048T5 (de) | 2012-12-18 | 2015-09-17 | Synopsys, Inc. | Hierarchisches Leistungsabbild für leistungsarmen Entwurf |
US9015400B2 (en) * | 2013-03-05 | 2015-04-21 | Qualcomm Incorporated | Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW) |
US9330026B2 (en) * | 2013-03-05 | 2016-05-03 | Qualcomm Incorporated | Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW) |
US9411745B2 (en) * | 2013-10-04 | 2016-08-09 | Qualcomm Incorporated | Multi-core heterogeneous system translation lookaside buffer coherency |
US9619387B2 (en) * | 2014-02-21 | 2017-04-11 | Arm Limited | Invalidating stored address translations |
US9747239B2 (en) * | 2014-08-25 | 2017-08-29 | Apple Inc. | Transaction filter for on-chip communications network |
GB2549239A (en) * | 2014-11-13 | 2017-10-18 | Advanced Risc Mach Ltd | Context sensitive barriers in data processing |
-
2016
- 2016-03-31 US US15/086,054 patent/US10386904B2/en active Active
-
2017
- 2017-03-13 BR BR112018070131A patent/BR112018070131A2/pt unknown
- 2017-03-13 CN CN201780017460.7A patent/CN108780350B/zh active Active
- 2017-03-13 JP JP2018550581A patent/JP6640374B2/ja not_active Expired - Fee Related
- 2017-03-13 KR KR1020187028213A patent/KR102048399B1/ko active IP Right Grant
- 2017-03-13 WO PCT/US2017/022158 patent/WO2017172342A1/fr active Application Filing
- 2017-03-13 EP EP17714333.6A patent/EP3436895B1/fr active Active
- 2017-03-13 CA CA3015929A patent/CA3015929A1/fr not_active Abandoned
- 2017-03-24 TW TW106109847A patent/TWI698746B/zh not_active IP Right Cessation
-
2019
- 2019-07-01 US US16/458,940 patent/US20190324512A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
BR112018070131A2 (pt) | 2019-02-05 |
EP3436895A1 (fr) | 2019-02-06 |
WO2017172342A1 (fr) | 2017-10-05 |
EP3436895B1 (fr) | 2023-08-02 |
CN108780350A (zh) | 2018-11-09 |
US10386904B2 (en) | 2019-08-20 |
TWI698746B (zh) | 2020-07-11 |
JP6640374B2 (ja) | 2020-02-05 |
TW201737093A (zh) | 2017-10-16 |
JP2019517052A (ja) | 2019-06-20 |
KR20180125978A (ko) | 2018-11-26 |
CN108780350B (zh) | 2021-08-06 |
US20170285705A1 (en) | 2017-10-05 |
KR102048399B1 (ko) | 2020-01-09 |
US20190324512A1 (en) | 2019-10-24 |
EP3436895C0 (fr) | 2023-08-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request |
Effective date: 20190910 |
|
FZDE | Discontinued |
Effective date: 20220308 |
|
FZDE | Discontinued |
Effective date: 20220308 |