CA2469428A1 - Voltage controller for switching power supplies - Google Patents
Voltage controller for switching power supplies Download PDFInfo
- Publication number
- CA2469428A1 CA2469428A1 CA002469428A CA2469428A CA2469428A1 CA 2469428 A1 CA2469428 A1 CA 2469428A1 CA 002469428 A CA002469428 A CA 002469428A CA 2469428 A CA2469428 A CA 2469428A CA 2469428 A1 CA2469428 A1 CA 2469428A1
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- CA
- Canada
- Prior art keywords
- controller
- digital
- voltage
- adc
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/502—Analogue/digital converters with intermediate conversion to time interval using tapped delay lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/60—Analogue/digital converters with intermediate conversion to frequency of pulses
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
A voltage controller (150), the controller comprising: a voltage comparator (700) operative to provide a digital error signal (152); a compensator (300) operative to determine a digital control signal (154) based on said provided error signal; and a modulator (400) operative to provide a power control signal (156) based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.
Claims (51)
1. A voltage controller (150) comprising:
a comparator (700) operative to compare a converter output voltage (104) to a reference voltage (106) and generate a digital error signal (152) indicative of a difference between said compared voltages;
a compensator (300), including a lookup table (302), for determining a digital control signal (154) based on said generated digital error signal; and a modulator (400) operative to provide a power control signal (156) in response to said determined digital control signal.
a comparator (700) operative to compare a converter output voltage (104) to a reference voltage (106) and generate a digital error signal (152) indicative of a difference between said compared voltages;
a compensator (300), including a lookup table (302), for determining a digital control signal (154) based on said generated digital error signal; and a modulator (400) operative to provide a power control signal (156) in response to said determined digital control signal.
2. The controller of claim 1 wherein said controller includes no passive electronic components.
3. The controller of claim 1 wherein said comparator is implemented entirely with digital logic gates.
4. The controller of claim 1 wherein all energy-storing components in said controller are digital logic gates.
5. The controller of claim 1 wherein said comparator is a delay line analog-to-digital converter (ADC) (700).
6. The controller of claim 5 wherein said delay line ADC comprises a delay cell array (740).
7. The controller of claim 5 wherein said delay line ADC is operative to provide a thermometer code output (772) indicative of said difference between said compared voltages.
8. The controller of claim 7 wherein an extent of test signal propagation through said delay line ADC establishes said thermometer code.
9. The controller of claim 7 wherein said delay line ADC comprises an encoder (730) operative to convert said thermometer code into said digital error signal.
10. The controller of claim 1 wherein said compensator comprises a plurality of lookup tables (302), (304), (306), each lookup table including an entry.
11. The controller of claim 10 wherein each of said entries is a product of a selected coefficient and a digital error magnitude corresponding to said generated digital error signal.
12. The controller of claim 10 wherein an entry of said entries is a product of a first coefficient and a present digital error magnitude.
13. The controller of claim 10 wherein an entry of said entries is a product of a second coefficient and a prior digital error magnitude.
14. The controller of claim 1 wherein said lookup table includes information operative to implement a PID (proportional, integral, and derivative) control algorithm.
15. The controller of claim 1 wherein said compensator comprises an adder 318 operative to sum a plurality of products of digital error magnitudes and coefficients of said digital error magnitudes.
16. The controller of claim 1 wherein said modulator is a digital pulse width modulator.
17. The controller of claim 1 wherein said modulator comprises a counter (406) operative to determine a first component of a pulse-on period for said power control signal.
18. The controller of claim 1 wherein said modulator comprises a delay line (402) operative to determine a second component of a pulse-on period for said power control signal.
19. The controller of claim 1 wherein said modulator comprises:
a counter operative to determine a first component of a pulse-on period for said power control signal; and a delay line operative to determine a second component of said pulse-on period for said power control signal.
a counter operative to determine a first component of a pulse-on period for said power control signal; and a delay line operative to determine a second component of said pulse-on period for said power control signal.
20. An analog to digital converter (ADC) (700) comprising:
an array (740) of delay cells;
an input voltage (108) providing power to each said cell; and a signal tap array (780) coupled to said delay cell array.
an array (740) of delay cells;
an input voltage (108) providing power to each said cell; and a signal tap array (780) coupled to said delay cell array.
21. The ADC of claim 20 wherein said delay cells are digital logic gates.
22. The ADC of claim 20 wherein said ADC includes no passive analog components.
23. The ADC of claim 20 wherein a speed of test signal propagation through said delay cell array is substantially proportional to a magnitude of said input voltage.
24. The ADC of claim 23 wherein said signal tap array comprises a signal tap (728) coupled to each said delay cell.
25. The ADC of claim 24 wherein statuses of said signal taps are indicative of said signal propagation speed through said delay cell array.
26. The ADC of claim 20 further comprising an encoder for converting thermometer code (772) from said signal tap array into a digital error signal.
27. The ADC of claim 20 wherein said ADC includes no capacitors or inductors.
28. The ADC of claim 20 wherein said ADC includes no capacitors, inductors, or resistors.
29. A voltage controller (150), the controller comprising:
a voltage comparator (700) operative to provide a digital error signal (152);
a compensator (300) operative to determine a digital control signal based on said provided error signal; and a modulator (400) operative to provide a power control signal based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.
a voltage comparator (700) operative to provide a digital error signal (152);
a compensator (300) operative to determine a digital control signal based on said provided error signal; and a modulator (400) operative to provide a power control signal based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.
30. The voltage controller of claim 29 wherein all of said digital logic gates correspond to standard library cells.
31. The voltage controller of claim 29 wherein all of said digital logic gates are HDL (hardware description language)-compatible.
32. The voltage controller of claim 29 wherein said controller includes no passive electronic components.
33. The voltage controller of claim 29 wherein said controller includes no analog energy storage components.
34. The voltage controller of claim 29 wherein said controller includes no capacitors, inductors, or resistors.
35. A method for controlling voltage, the method comprising:
comparing (700) a converter output voltage with a reference voltage;
generating a digital error signal indicative of a result of said comparing;
and providing a power control signal (156) indicative of said generated error signal, wherein said comparing, said generating, and said providing are performed entirely with digital logic gates.
comparing (700) a converter output voltage with a reference voltage;
generating a digital error signal indicative of a result of said comparing;
and providing a power control signal (156) indicative of said generated error signal, wherein said comparing, said generating, and said providing are performed entirely with digital logic gates.
36. The method of claim 35 wherein said comparing comprises powering a plurality of an array (740) of delay cells with said converter output voltage.
37. The method of claim 35 wherein said comparing comprises measuring an extent of test signal propagation through an array of delay cells, said delay cells being powered by said converter output voltage.
38. The method of claim 35 wherein said providing comprises determining a digital control signal from said generated error signal according to a control algorithm.
39. The method of claim 38 wherein said determining comprises selecting a lookup table entry based on a value of said generated error signal.
40. The method of claim 35 wherein said providing comprises determining a duty ratio from said generated error signal according to a control algorithm.
41. A method of controlling voltage (150), the method comprising:
receiving a regulator output voltage (104);
converting said received output voltage into a digital error signal (152) employing a delay line analog to digital converter (ADC) (700); and adjusting said regulator output voltage based on said digital error signal.
receiving a regulator output voltage (104);
converting said received output voltage into a digital error signal (152) employing a delay line analog to digital converter (ADC) (700); and adjusting said regulator output voltage based on said digital error signal.
42. The method of claim 41 wherein said converting comprises:
powering a delay cell array (740) with said received converter output voltage 104;
measuring a speed of test signal propagation through said powered delay cell array; and generating said digital error signal indicative of said measured test signal propagation speed.
powering a delay cell array (740) with said received converter output voltage 104;
measuring a speed of test signal propagation through said powered delay cell array; and generating said digital error signal indicative of said measured test signal propagation speed.
43. The method of claim 42 wherein said converting further comprises calibrating said delay line ADC.
44. The method of claim 43 wherein said calibrating comprises:
converting a reference voltage into a reference conversion error value employing said delay line ADC; and adding (1114) said reference conversion error value to said digital error signal, thereby providing a corrected digital error signal (1152).
converting a reference voltage into a reference conversion error value employing said delay line ADC; and adding (1114) said reference conversion error value to said digital error signal, thereby providing a corrected digital error signal (1152).
45. The method of claim 43 wherein said calibrating comprises:
powering said delay cell array with a reference voltage (106);
measuring a speed of test signal propagation through said reference voltage-powered delay cell array;
generating a reference conversion error value (1108) indicative of said measured test signal propagation speed; and adding (1114) said reference conversion error value to said generated digital error signal.
powering said delay cell array with a reference voltage (106);
measuring a speed of test signal propagation through said reference voltage-powered delay cell array;
generating a reference conversion error value (1108) indicative of said measured test signal propagation speed; and adding (1114) said reference conversion error value to said generated digital error signal.
46. The method of claim 41 wherein said adjusting comprises determining a digital control signal based on said generated digital error signal according to a control algorithm.
47. A voltage controller (150) comprising:
a source of converter output voltage (104);
a delay line analog to digital converter (ADC) (700) responsive to said output voltage to generate a digital error signal (152) indicative of a difference between said output voltage and a previously stored reference voltage;
a digital electronic calculator (300) responsive to said digital error signal to generate a digital control signal; and a pulse width modulator (400) responsive to said generated digital control signal to generate a pulse-on period for a power control signal.
a source of converter output voltage (104);
a delay line analog to digital converter (ADC) (700) responsive to said output voltage to generate a digital error signal (152) indicative of a difference between said output voltage and a previously stored reference voltage;
a digital electronic calculator (300) responsive to said digital error signal to generate a digital control signal; and a pulse width modulator (400) responsive to said generated digital control signal to generate a pulse-on period for a power control signal.
48. The voltage controller of claim 47 wherein said delay line ADC is responsive to a comparison between an active source of reference voltage and said previously stored reference voltage to generate a reference conversion error value.
49. The voltage controller of claim 48 wherein said delay line ADC
comprises a register (1106) to store said reference conversion error value.
comprises a register (1106) to store said reference conversion error value.
50. The voltage controller of claim 49 wherein said delay line ADC further comprises a voltage comparison circuit (1114) responsive to said digital error signal and said reference conversion error value to generate a sum of said digital error signal and said reference conversion error value.
51. The voltage controller of claim 47 wherein said pulse width modulator comprises:
a counter (406) responsive to a first selection of bits of said digital control signal to generate a first component of said pulse-on period; and a delay line (402) responsive to a second selection of bits of said digital control signal to generate a second component of said pulse-on period.
a counter (406) responsive to a first selection of bits of said digital control signal to generate a first component of said pulse-on period; and a delay line (402) responsive to a second selection of bits of said digital control signal to generate a second component of said pulse-on period.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US33871201P | 2001-12-07 | 2001-12-07 | |
| US60/338,712 | 2001-12-07 | ||
| US10/291,098 | 2002-11-08 | ||
| US10/291,098 US7061292B2 (en) | 2001-11-09 | 2002-11-08 | Adaptive voltage regulator for powered digital devices |
| PCT/US2002/039189 WO2003050637A2 (en) | 2001-12-07 | 2002-12-09 | Voltage controller for switching power supplies |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2469428A1 true CA2469428A1 (en) | 2003-06-19 |
| CA2469428C CA2469428C (en) | 2012-01-31 |
Family
ID=26966574
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA2469428A Expired - Fee Related CA2469428C (en) | 2001-12-07 | 2002-12-09 | Voltage controller for switching power supplies |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP1451920A2 (en) |
| JP (1) | JP4545439B2 (en) |
| AU (1) | AU2002364535A1 (en) |
| CA (1) | CA2469428C (en) |
| WO (1) | WO2003050637A2 (en) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005011118A2 (en) | 2003-07-25 | 2005-02-03 | University Of Limerick | A digital pulse width modulator |
| US8396111B2 (en) | 2003-07-25 | 2013-03-12 | Powervation Limited | Digital pulse width modulator |
| US6958721B2 (en) | 2003-09-18 | 2005-10-25 | The Regents Of The University Of Colorado | Matched delay line voltage converter |
| GB2421594A (en) * | 2004-12-21 | 2006-06-28 | Cambridge Semiconductor Ltd | Switch mode power supply digital control system |
| US7902803B2 (en) | 2005-03-04 | 2011-03-08 | The Regents Of The University Of Colorado | Digital current mode controller |
| US7315270B2 (en) | 2005-03-04 | 2008-01-01 | The Regents Of The University Of Colorado | Differential delay-line analog-to-digital converter |
| EP1900087A2 (en) | 2005-07-06 | 2008-03-19 | Cambridge Semiconductor Limited | Switch mode power supply control systems |
| US7872542B2 (en) | 2005-08-01 | 2011-01-18 | Marvell World Trade Ltd. | Variable capacitance with delay lock loop |
| US7710098B2 (en) | 2005-12-16 | 2010-05-04 | Cambridge Semiconductor Limited | Power supply driver circuit |
| US7733098B2 (en) | 2005-12-22 | 2010-06-08 | Cambridge Semiconductor Limited | Saturation detection circuits |
| JP5017904B2 (en) * | 2006-03-31 | 2012-09-05 | 株式会社日立製作所 | Elevator equipment |
| US7342528B2 (en) | 2006-06-15 | 2008-03-11 | Semiconductor Components Industries, L.L.C. | Circuit and method for reducing electromagnetic interference |
| JP5272067B2 (en) * | 2006-09-12 | 2013-08-28 | 株式会社豊田自動織機 | Switching power supply |
| JP4787712B2 (en) * | 2006-10-02 | 2011-10-05 | 日立コンピュータ機器株式会社 | PWM signal generation circuit and power supply device including the same |
| US7977994B2 (en) | 2007-06-15 | 2011-07-12 | The Regents Of The University Of Colorado, A Body Corporate | Digital pulse-width-modulator with discretely adjustable delay line |
| JP5423266B2 (en) | 2009-09-14 | 2014-02-19 | 富士電機株式会社 | Digitally controlled switching power supply |
| JP5493716B2 (en) * | 2009-10-30 | 2014-05-14 | 富士電機株式会社 | Digitally controlled switching power supply |
| JP5445088B2 (en) * | 2009-12-08 | 2014-03-19 | 富士電機株式会社 | Digitally controlled switching power supply |
| EP2337203B1 (en) * | 2009-12-15 | 2013-05-22 | Nxp B.V. | Circuit for a switch mode power supply |
| JP2012039710A (en) * | 2010-08-05 | 2012-02-23 | Sanken Electric Co Ltd | Switching power supply device |
| JP2012039761A (en) * | 2010-08-06 | 2012-02-23 | Sanken Electric Co Ltd | Switching power supply device |
| JP2012044784A (en) | 2010-08-19 | 2012-03-01 | Sanken Electric Co Ltd | Switching power supply device |
| JP5566859B2 (en) | 2010-11-17 | 2014-08-06 | 株式会社東芝 | Power circuit |
| JP5306400B2 (en) * | 2011-03-24 | 2013-10-02 | 株式会社東芝 | DC-DC converter |
| KR101291344B1 (en) | 2011-10-28 | 2013-07-30 | 숭실대학교산학협력단 | Control apparatus for switching mode power supply |
| JP6018829B2 (en) | 2012-07-27 | 2016-11-02 | ローム株式会社 | Power supply apparatus, power supply system, and power supply method |
| JP6043532B2 (en) | 2012-07-27 | 2016-12-14 | ローム株式会社 | Power supply apparatus, power supply system, and power supply method |
| JP5925724B2 (en) * | 2013-04-24 | 2016-05-25 | コーセル株式会社 | Switching power supply |
| JP6085523B2 (en) | 2013-05-30 | 2017-02-22 | ルネサスエレクトロニクス株式会社 | Semiconductor device and method of operating semiconductor device |
| JP6071840B2 (en) | 2013-10-25 | 2017-02-01 | 株式会社東芝 | A / D converter and semiconductor integrated circuit |
| RU2625609C1 (en) * | 2016-02-25 | 2017-07-17 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Кубанский государственный технологический университет" (ФГБОУ ВО "КубГТУ") | Sine-cosine digital converter |
| US10770969B2 (en) | 2016-09-28 | 2020-09-08 | B. G. Negev Technologies And Applications Ltd., At Ben-Gurion University | Digital average current-mode control voltage regulator and a method for tuning compensation coefficients thereof |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5925577A (en) * | 1982-08-03 | 1984-02-09 | Mitsubishi Electric Corp | Switching regulator |
| JPH04125707A (en) * | 1990-09-18 | 1992-04-27 | Nippon Telegr & Teleph Corp <Ntt> | Output voltage controller for switching power source |
| JP2685979B2 (en) * | 1990-11-28 | 1997-12-08 | 株式会社日立製作所 | Power supply |
| JP3064644B2 (en) * | 1992-03-16 | 2000-07-12 | 株式会社デンソー | A / D conversion circuit |
| US5631550A (en) * | 1996-04-25 | 1997-05-20 | Lockheed Martin Tactical Defense Systems | Digital control for active power factor correction |
| US6005377A (en) * | 1997-09-17 | 1999-12-21 | Lucent Technologies Inc. | Programmable digital controller for switch mode power conversion and power supply employing the same |
| JPH11122913A (en) * | 1997-10-15 | 1999-04-30 | Mitsubishi Electric Corp | High-voltage generating circuit |
| US6140777A (en) * | 1998-07-29 | 2000-10-31 | Philips Electronics North America Corporation | Preconditioner having a digital power factor controller |
| JP2000152607A (en) * | 1998-11-06 | 2000-05-30 | Canon Inc | Semiconductor integrated circuit |
-
2002
- 2002-12-09 JP JP2003551629A patent/JP4545439B2/en not_active Expired - Fee Related
- 2002-12-09 AU AU2002364535A patent/AU2002364535A1/en not_active Abandoned
- 2002-12-09 WO PCT/US2002/039189 patent/WO2003050637A2/en active Application Filing
- 2002-12-09 CA CA2469428A patent/CA2469428C/en not_active Expired - Fee Related
- 2002-12-09 EP EP02799912A patent/EP1451920A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| EP1451920A2 (en) | 2004-09-01 |
| AU2002364535A1 (en) | 2003-06-23 |
| JP2005512493A (en) | 2005-04-28 |
| WO2003050637A3 (en) | 2004-05-21 |
| AU2002364535A8 (en) | 2003-06-23 |
| JP4545439B2 (en) | 2010-09-15 |
| WO2003050637A2 (en) | 2003-06-19 |
| CA2469428C (en) | 2012-01-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| MKLA | Lapsed |
Effective date: 20191209 |