CA2166493C

CA2166493C - Compact device for monitoring asynchronous transfer mode cells

Info

Publication number: CA2166493C
Application number: CA002166493A
Authority: CA
Inventors: Hiroshi Yamashita; Takashi Miyazono
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1991-01-16
Filing date: 1992-01-15
Publication date: 1999-01-26
Anticipated expiration: 2012-01-15
Also published as: CA2166493A1

Abstract

In a device for checking a header error in a header part of an STM (synchronous transfer mode) signal (S) which part comprises first through P-th header blocks and an HEC
(header error check) block, each header block comprising first through N-th ATM (asynchronous transfer mode) cell header units, the HEC block comprising first through N-th ATM cell HEC units, a sole error checking section (33, 35, 37) checks the header error in connection with an n-th ATM cell header unit of a p-th header block and an n-th ATM cell HEC unit when a collective control signal indicates the n-th ATM cell header unit of the p-th header block and the n-th ATM cell HEC unit, where n 18 variable between 1 and N, both inclusive, p being variable between 1 and P, both inclusive. A signal producing section (15) produces the collective control signal for indicating successively the first through the N-th ATM cell header units of the first through the P-th header blocks and subsequently successively the first through the N-th ATM cell HEC units. On monitoring an ATM cell of a preselected number of bytes, the ATM cell may be converted into a converted cell of the preselected number of bytes plus an empty byte at first. Subsequently, an error correcting code is calculated from the preselected number of bytes of the converted cell and is placed in the empty byte to form a full cell.

Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. An ATM cell monitoring device for use in combination with an ATM cell transmission system having system input and system output terminals, said system input terminal being for receiving a system input ATM cell, said ATM cell transmission system being for transmitting said system input ATM cell to said system output terminal as it is, said ATM cell transmission system being for producing said system input ATM
cell as a system output ATM cell, said ATM cell monitoring device being for monitoring said ATM cell transmission system to check an error in said system output ATM cell, said ATM
cell monitoring device comprising:
a first format converter supplied with an original ATM
cell of a preselected number of bytes for converting said original ATM cell into a first converted ATM cell of said preselected number of bytes plus an empty byte;
a first error checking circuit connected to said format converter for checking a first error in the preselected number of bytes in said first converted ATM cell to produce a first error correcting code;
a combiner connected to said system input terminal of the ATM cell transmission system, said format converter, and said first error checking circuit for producing a full ATM cell by placing said first error correcting code in the empty byte of said first converted ATM cell, said combiner delivering said full ATM cell to said system input terminal as said system input ATM cell;
a second error checking circuit connected to said system output terminal of the ATM cell transmission system for checking a second error in the preselected number of bytes in said system output ATM cell to produce a second error correcting code; and a comparator connected to said system output terminal of the ATM cell transmission system and said second error checking circuit for comparing said first error correcting code in said system output ATM cell with said second error correcting code to produce coincidence and non-coincidence signals when said first error correcting code is coincident with said second error correcting code and when said first error correcting code is not coincident with said second error correcting code, respectively, said coincidence signal representing that said original ATM cell is correctly transmitted to said system output terminal by said ATM cell transmission system, said non-coincidence signal representing that said original ATM cell is incorrectly transmitted to said system output terminal by said ATM cell transmission system.

2. An ATM cell monitoring device as claimed in claim 1, wherein said ATM cell monitoring device further comprises a second format converter connected to said system output terminal of the ATM cell transmission system for converting said system output ATM cell of said preselected number of bytes plus said first error correcting code into a second converted ATM cell of said preselected number of bytes.

3. An ATM cell monitoring device as claimed in claim 1, wherein:
said first error checking circuit is a first cyclic redundancy check circuit connected to said first format converter for checking said first error in the preselected number of bytes in said first converted ATM cell to produce said first error correcting code;
said second error checking circuit being a second cyclic redundancy check circuit connected to said system output terminal of the ATM cell transmission system for checking said second error in the preselected number of bytes in said system output ATM cell to produce said second error correcting code.