KR960016266A - SAR receiver processing system of ATM communication system - Google Patents

SAR receiver processing system of ATM communication system Download PDF

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Publication number
KR960016266A
KR960016266A KR1019940028197A KR19940028197A KR960016266A KR 960016266 A KR960016266 A KR 960016266A KR 1019940028197 A KR1019940028197 A KR 1019940028197A KR 19940028197 A KR19940028197 A KR 19940028197A KR 960016266 A KR960016266 A KR 960016266A
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KR
South Korea
Prior art keywords
sar
signal
error
counter
processing unit
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KR1019940028197A
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Korean (ko)
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KR970002722B1 (en
Inventor
윤성욱
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배순훈
대우전자 주식회사
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Priority to KR1019940028197A priority Critical patent/KR970002722B1/en
Publication of KR960016266A publication Critical patent/KR960016266A/en
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Publication of KR970002722B1 publication Critical patent/KR970002722B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • H04L2012/5653—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly using the ATM adaptation layer [AAL]
    • H04L2012/5657—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly using the ATM adaptation layer [AAL] using the AAL3/4

Abstract

본 발명은 ATM통신압식의 SAR수신처리장치에 관한 것으로, 지연된 전송완료신호에 의해 소정의 카운트값을 카운트하여 CRC 및 FIFO 제어신호들을 발생하는 카운터 및 제어부(22); 전송완료(SAR_UNITDATA_invoke)신호를 수신하여 카운터 및 제어부(22)이 제어신호에 따라 48바이트 단위로 CRC처리하여 에러를 검출 및 정정하는 CRC 및 FIFO리드회로(23); 제어신호(s_h)에 따라 SAR 헤더를 분리한 후 에러가 발생했는지를 검사하는 SAR헤더처리부(24); 제어신호(s_t)에 따라 SAR 트레일러를 분리한 후 에러가 발생했는지를 검사하는 SAR 트레일러처리부(25); 카운트완료(complete)신호와 세그먼트형태 데이타(rcv_ST)를 입력하여 하나의 메세지를 조립완료한 후 조립완료신호를 발생하는 조립완료신호발생부(26); 에러검출신호를 입력하여 메세지 조립후 사용자 어브트신호 또는 프로토콜 어브트신호를 발생하는 에러처리부(27); 및 길이표시(LI)데이타를 입력하여 조립완료된 메세지의 길이를 계산하는 길이 계산회로(28)를 구비하여 하위 ATM계층으로부터 수신한 48바이트의 세그먼트에서 2바이트의 SAR 헤더와 2바이트의 SAR 트레일러를 분리하여 에러를 검사하고, 세그먼트를 재조립한다.The present invention relates to an SAR communication processing apparatus of ATM communication pressure type, comprising: a counter and a controller 22 for counting a predetermined count value by a delayed transmission completion signal and generating CRC and FIFO control signals; A CRC and FIFO read circuit 23 for receiving a transmission completion (SAR_UNITDATA_invoke) signal and detecting and correcting an error by CRC processing by the counter and the controller 22 in units of 48 bytes according to the control signal; A SAR header processing unit 24 for checking whether an error has occurred after separating the SAR header according to the control signal s_h; A SAR trailer processing unit 25 for checking whether an error has occurred after separating the SAR trailer according to the control signal s_t; An assembly completion signal generator 26 for inputting a count completion signal and segment type data rcv_ST to complete an assembly and generating an assembly completion signal; An error processing unit 27 for inputting an error detection signal and generating a user adject signal or a protocol advert signal after assembling a message; And a length calculation circuit 28 for inputting the length indication (LI) data to calculate the length of the assembled message, thereby obtaining a 2-byte SAR header and 2-byte SAR trailer from a 48-byte segment received from the lower ATM layer. Check for errors and reassemble the segments.

Description

ATM 통신방식의 SAR 수신처리장치SAR receiver processing system of ATM communication system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 따른 SAR 수신처리장치를 도시한 블럭도,1 is a block diagram showing a SAR receiving processing apparatus according to the present invention;

제2도는 본 발명에 따른 SAR 수신처리장치를 설명하기 위하여 도시한 것으로서, (가)는 AAL계층의 데이타 흐름 구조를 도시한 도면, (나)는 SAR-PDU 데이타의 포맷을 도시한 도면.2 is a view illustrating a SAR receiving processing apparatus according to the present invention, (a) shows a data flow structure of an AAL layer, and (b) shows a format of SAR-PDU data.

Claims (1)

ATM통신방식의 AAL 3/4 프로토콜에 따른 SAR수신처리장치에 있이서, 지연된 전송완료(SAK_UNITDATA_invoke)신호를 수신하여 소정의 카운트값을 카운트하고 CRC 및 FIFO 제어신호들을 발생하는 카운터 및 제어부(22); 상기 전송완료(SAR_UNITDATA_invoke)신호를 수신하여 카운터 및 제어부(22)이 제어신호에 따라 세그먼트 데이타를 순차적으로 읽어와 48바이트 단위로 CRC처리하여 에러를 검출 및 정정하는 데이타를 전달하는 CRC 및 FIFO리드회로(23); 상기 카운터 및 제어부(22)의 제어신호(s_h)에 따라 48바이트의 데이타에서 SAR 헤더를 분리한 후 에러가 발생했는지를 검사하는 SAR헤더처리부(24); 상기 카운터 및 제어부(22)의 제어신호(s_t)에 따라 48바이트의 데이타에서 SAR 트레일러를 분리한 후 에러가 발생했는지를 검사하는 SAR 트레일러처리부(25); 상기 카운터 및 제어부(22)가 하나의 세그먼트에 대해 카운트를 완료하고 발생한 카운트완료(complete)신호와 수신된 세그먼트의 헤더에 포함된 세그먼트형태 데이타(rcv_ST)를 입력하여 하나의 메세지를 조립완료한 후 조립완료(CPCS_UMTDATA_invoke)신호를 발생하는 조립완료신호발생부(26); 상기 SAR 헤더처리부(24), SAR 트레일러처러부(25), CRC 및 FIFO 리드회로(23)로부터 에러검출신호를 입력하여 메세지 조립후 사용자 어보트(SAR_U_Abort)신호 또는 프로트콜 어브트(SAR_P_Abort)신호를 발생하는 에러처리부(27); 및 SAR 트레일러처리부(25)로부터 길이표시(LI)데이타를 입력하여 메세지의 전체 길이를 계산하는 길이계산회로(28)를 구비하여 하위 ATM계층으로부터 수신한 48바이트의 세그먼트에서 2바이트의 SAR 헤더와 2바이트의 SAR 트레일러를 분리하여 에러를 검사하고, 각 관련된 세그먼트를 조립하여 하나의 메세지로 복원한 후 CPCS계층으로 올려보내는 것을 특징으로 하는 ATM통신방식의 SAR 수신처리장치.In the SAR reception apparatus according to the AAL 3/4 protocol of the ATM communication method, a counter and control unit 22 receives a delayed transmission completion signal (SAK_UNITDATA_invoke), counts a predetermined count value, and generates CRC and FIFO control signals. ; CRC and FIFO read circuits that receive the transmission completion (SAR_UNITDATA_invoke) signal and the counter and the controller 22 sequentially read the segment data according to the control signal and perform CRC processing on a 48-byte basis to deliver data for detecting and correcting errors. (23); A SAR header processing unit (24) for checking whether an error has occurred after separating the SAR header from 48 bytes of data according to the counter and the control signal (s_h) of the control unit (22); A SAR trailer processing unit (25) for checking whether an error has occurred after separating the SAR trailer from 48 bytes of data according to the counter and the control signal (s_t) of the control unit (22); After the counter and the control unit 22 complete counting for one segment and input the count complete signal generated and the segment type data (rcv_ST) included in the header of the received segment, the counter and the controller 22 complete the assembly of one message. An assembly completion signal generator 26 generating an assembly completion signal (CPCS_UMTDATA_invoke); Error detection signal is inputted from the SAR header processing unit 24, the SAR trailer handling unit 25, the CRC and the FIFO lead circuit 23, and then a user abort (SAR_U_Abort) signal or a protocol call (SAR_P_Abort) signal is assembled. Error processing unit 27 for generating a; And a length calculation circuit 28 for inputting the length indication (LI) data from the SAR trailer processing unit 25 to calculate the total length of the message, and including the two-byte SAR header in the 48-byte segment received from the lower ATM layer. SAR receiving processing apparatus of the ATM communication method characterized in that the two-byte SAR trailer to check the error, each associated segment is assembled and restored to a single message and then sent to the CPCS layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940028197A 1994-10-31 1994-10-31 Sar receiver processor of atm KR970002722B1 (en)

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Application Number Priority Date Filing Date Title
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KR960016266A true KR960016266A (en) 1996-05-22
KR970002722B1 KR970002722B1 (en) 1997-03-08

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KR101435805B1 (en) * 2007-11-07 2014-08-29 엘지전자 주식회사 Method and apparatus for correcting error of the received message in terminal

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