CA2023172A1 - Methode de fabrication de condensateurs a deux polymeres - Google Patents

Methode de fabrication de condensateurs a deux polymeres

Info

Publication number
CA2023172A1
CA2023172A1 CA 2023172 CA2023172A CA2023172A1 CA 2023172 A1 CA2023172 A1 CA 2023172A1 CA 2023172 CA2023172 CA 2023172 CA 2023172 A CA2023172 A CA 2023172A CA 2023172 A1 CA2023172 A1 CA 2023172A1
Authority
CA
Canada
Prior art keywords
poly layer
layer
regions
poly
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA 2023172
Other languages
English (en)
Inventor
Francois L. Cordeau
Gord Harling
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi Semiconductor ULC
Original Assignee
Mitel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitel Corp filed Critical Mitel Corp
Priority to CA 2023172 priority Critical patent/CA2023172A1/fr
Priority to PCT/CA1991/000277 priority patent/WO1992003843A1/fr
Publication of CA2023172A1 publication Critical patent/CA2023172A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/707—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
CA 2023172 1990-08-13 1990-08-13 Methode de fabrication de condensateurs a deux polymeres Abandoned CA2023172A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CA 2023172 CA2023172A1 (fr) 1990-08-13 1990-08-13 Methode de fabrication de condensateurs a deux polymeres
PCT/CA1991/000277 WO1992003843A1 (fr) 1990-08-13 1991-08-12 Procede de fabrication de condensateurs et de resistances polycristallins pour circuits integres et circuit integre obtenu au moyen dudit procede

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA 2023172 CA2023172A1 (fr) 1990-08-13 1990-08-13 Methode de fabrication de condensateurs a deux polymeres

Publications (1)

Publication Number Publication Date
CA2023172A1 true CA2023172A1 (fr) 1992-02-14

Family

ID=4145723

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2023172 Abandoned CA2023172A1 (fr) 1990-08-13 1990-08-13 Methode de fabrication de condensateurs a deux polymeres

Country Status (2)

Country Link
CA (1) CA2023172A1 (fr)
WO (1) WO1992003843A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960009209A (ko) * 1994-08-19 1996-03-22 이토 기요시 반도체 집적회로
US5541442A (en) * 1994-08-31 1996-07-30 International Business Machines Corporation Integrated compact capacitor-resistor/inductor configuration

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4209716A (en) * 1977-05-31 1980-06-24 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in second-level polycrystalline silicon layer
US4455568A (en) * 1981-08-27 1984-06-19 American Microsystems, Inc. Insulation process for integrated circuits
US4577390A (en) * 1983-02-23 1986-03-25 Texas Instruments Incorporated Fabrication of polysilicon to polysilicon capacitors with a composite dielectric layer
JPS59210658A (ja) * 1983-05-16 1984-11-29 Nec Corp 半導体装置の製造方法
US4639274A (en) * 1984-11-28 1987-01-27 Fairchild Semiconductor Corporation Method of making precision high-value MOS capacitors

Also Published As

Publication number Publication date
WO1992003843A1 (fr) 1992-03-05

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Legal Events

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