CA2008132A1 - Method for reducing reflection-induced fluctuations of structure size in a cover layer in the optical lithography used in the manufacture of integrated circuits in a substrate - Google Patents
Method for reducing reflection-induced fluctuations of structure size in a cover layer in the optical lithography used in the manufacture of integrated circuits in a substrateInfo
- Publication number
- CA2008132A1 CA2008132A1 CA 2008132 CA2008132A CA2008132A1 CA 2008132 A1 CA2008132 A1 CA 2008132A1 CA 2008132 CA2008132 CA 2008132 CA 2008132 A CA2008132 A CA 2008132A CA 2008132 A1 CA2008132 A1 CA 2008132A1
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- CA
- Canada
- Prior art keywords
- layer
- lambda
- substrate
- thickness
- cover
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/091—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement
Abstract
ABSTRACT OF THE DISCLOSURE
For reducing reflection-induced fluctuations of structure size in a cover layer composed, for example, of photoresist in the manufacture of integrated circuits in a substrate composed, for example, of silicon by optical lithography, an antireflection layer is applied under the cover layer. In one embodiment of the antireflection layer, it is continuously composed of one material, for example Si3N4, that has a refractive index that is higher than that of the cover layer and has a thickness that corresponds to one quarter of the wavelength of the light employed for exposure. In a further embodiment of the antireflection layer, it is composed of a first layer, of, for example, SiOxNy and of a second layer of, for example, SiO2 whereby the first layer lying under the cover layer has a higher refractive index than the cover layer, the second layer lying under the first layer has a lower refractive index than the first layer and the substrate lying under the second layer has a higher refractive index than the substrate.
For reducing reflection-induced fluctuations of structure size in a cover layer composed, for example, of photoresist in the manufacture of integrated circuits in a substrate composed, for example, of silicon by optical lithography, an antireflection layer is applied under the cover layer. In one embodiment of the antireflection layer, it is continuously composed of one material, for example Si3N4, that has a refractive index that is higher than that of the cover layer and has a thickness that corresponds to one quarter of the wavelength of the light employed for exposure. In a further embodiment of the antireflection layer, it is composed of a first layer, of, for example, SiOxNy and of a second layer of, for example, SiO2 whereby the first layer lying under the cover layer has a higher refractive index than the cover layer, the second layer lying under the first layer has a lower refractive index than the first layer and the substrate lying under the second layer has a higher refractive index than the substrate.
Description
3~
BACKGROIJND OF TH~ INVENTION
The present invention is directed to a method for reducing reflection-induced fluctuations of structure size in a cover layer arranged on a layer that contains silicon, amorphous alloys containing silicon and/or silicides, as employed in optical lithography in the manufacture of integrated circuits in a substrate.
In the manufacture of integrated circuits, a semi-conductor layer structure that has a photoresist layer as an uppermost layer is exposed through a photomask.
One part of the light used for the exposure is absorbed in the photoresist layer and another part of the liyht is reflected at the boundary layer of the photoresist layer to the layer laying therebelow. One part penetrates into the layers lying under the photoresist layer and is in turn partially reflected at boundary layers. The light reflected at the layer boundaries proceeds from the backside back into the photoresist layer. An undesired, second exposure of the photoresist layer occurs and is dependent on the interference condition, resulting in intensity flnctuations and fluctuations of structure size.
These fluctuations of structure size were previously compensated for in the manufacture of integrated circuits by either having greater tolerances and, thus, a larger area or by infringing the design rules resulting in reductions in yield.
The use of lambda quarter layers of dielectric material for reducing reflections of dielectric layers on, for example, eyeglasses or objectives is known from ' 8~
the field of optics (see, for example, Max Born, Emil Wolf, Principles of opticS, Pergamon Press, Oxford, 6th Edition, 1980, chapter 1.6; O.S. Heavens, Optical Properties of Thin Solid Films, New York 19854, chapter 4; H.A.M. van den Berg, J.B. van Staden, Antireflection Coatings On Metal Layers For Photolithographical Purposes, J. Appl. Phys. 50 (1979) 1212; L. Mader, D.
Widmann, W.G. Oldham, Reduction Of Line Width Variations In Optical Projection Printing, Lausanne, Switzerland, (1981), page 105).
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for reducing reflection-induced fluctuations of structure size in optical lithography that can be easily utilized in a manufacturing process of integrated circuits and that provides for narrower tolerances and production of finer structures.
This object is inventively achieved by a method of the type initially cited wherein an antireflection layer is applied under the cover layer.
The use of the antireflection layer under the cover layer composed, for example, of photoresist prevents a back-reflection of the light into the photoresist layer.
According to the present invention the antireflection layer is formed of one material, whereby the material has a higher refractive index than the cover layer. In this case, the antireflection layer is applied in a thickness that corresponds to one quarter of the wavelength of the light used in the exposure. Using an antireflection layer composed of Si3N4 layer can produce , ,., . : ' .
crystal defects on a silicon substrate. Further, a silicon oxide layer having a defined thickness may already be present on the silicon substrate. This layer ; has to be first removed or be thickened to a thickness that corresponds to half the wavelength before a lambda quarter layer of, for example, Si3N4 can be deposited.
In this case, an antireflection layer composed of a first layer and of a second layer is used. The first layer lying under the cover layer has a higher refractive index than the cover layer, has a lower refractive index than the first layer and the substrate located under the second layer has higher refractive index than the second layer. Simulation calculations with a computer program known as "SAMP~E" can show that such a combination of two layers effects a reduction in reflection similar to a lambda quarter layer. The first layer, for example, is compos~d of SioxNy~ whereby ~ and y are arbitrary numbers greater than or equal to 0. The second layer is composed, ~or e~ample, of sio2. For example, the substrate is composed of silicon and the cover layer is composed, for example, of sio2 or of photoresist. It is also possible to use a cover layer that is composed of a sio2 layer and of a photoresist layer. In one example, the photoresist layer is the cover layer, a non-absorbent Si3N4 is the first layer, a sio2 layer is th~ second layer and a silicon substrate is the substrate. When the first layer has a thickness between 0.004~/n and 0.0175~/n or 0.242~/n and 0.374~/n, the second layer has a thickness between 0.0~/n and 0.117~/n and, when the first layer has a thickness between 0.175~/n and 0.23~/n, the second ':
3~
.
.
layer has a thickness of less than 0.078~/n, where n is the refractive index of the respective layer and ~ is the wavelength of light employed in the exposure of the ~ optical lithography.
:-~ BRIEF DESCRIPTION OF THE DRAWINGS
The features of the present invention which are believed to be novel, are set forth with particularity . in the appended claims. The invention, together with : further ob~ects and advantages, may best be understood by reference to the following description taken in conjunction with the accompanying drawings, in the several Figures in which like reference numerals ident.ify like elements, and in which:
Figure 1 depicts the layers of an integrated circuit manufactured according to the present invention; and Figures 2-9 are graphs showing results of simulation calculations for the Figure 1 integrated circuit.
DESCRIPTION OF THE PREFERRED EMBODIMENT
Figure 1 shows a substrate 3 which is composed, for example, of silicon, polycrystalline silicon or of silicide. An antireflection layer 2 is applied over the ' substrate 3. The antireflection layer 2 is composed of a first layer 21 and a second layer 22. The first layer 21 is composed, for example, o SioxNy/ whereby x and y .; are arbitrary numbers greater than or equal to zero. The second layer 22 is composed, for example, of SiO2. The .- refractive index can be set with the stoichiometry of the first layer 21. The antireflection layer 2 is followed . by a cover layer 1. The cover layer 1 is composed of an ~ upper oxide layer 11 that is located directly over the :~ 5 ~':, ' 3~2 antireflection layer 2 and of a photoresist layer 12 that is located above the upper oxide layer 11. Thus, the second layer 22 has a lower refractive index than the substrate 3; the first layer 21 has a higher refractive index than the second layer 22; and the upper oxide layer 11 has a lower refractive index than the first layer 21.
Figure 2 shows the result of simulation calculations for the fluctuations of structure size in a structure having the following layer thicknesses: the photoresist layer 12 has a thickness of 1.47~m; the thicknesses of the upper oxide layer 11 as well as the first layer 21 that is composed of Si3N4 are variable; and the thickness of the second layer 22 is 25 nanometers. The fluctuations of structure size are entered in ~m as a function of the thickness of the upper oxide layer in ~m.
The thickness of the first layer 21 changes from curve to curve, whereby a thickness of 0 nanometers provides the basis for curve 201, a thickness of 110 nanometers provides the basis for curve 212 and a thickness that is 10 nanometers greater than that of the preceding curve provides the basis for the remaining curves having ascending numbering, that is curves 202 through 211. It may be derived from the diagram that there is an optimum thickness of the first layer 21 for a prescribed thickness of the second layer 22, this optimum thickness guaranteeing the greatest reliability against fluctuations of structure size due to fluctuations of the thickness of the upper oxide layer 11.
Figure 3 shows the result of simulation calculations of the Eluctuations of structure size as a function of ~ .
. 6 3~
.
the thickness of the upper oxide layer 11, whereby the thickness of the first layer 21 that is composed Si3N4 has been fixed at 20 nanometers and the thickness of the second layer 22 is varied between 0 and 150 nanometers.
The curve 31 corresponds to a thickness of 0 nanometers and the further curves correspond to a thickness that is greater by 10 nanometers for the remain:ing curves having ascending numbering, that is curves 32-39 and 310-316.
The curve 316 therefore corresponds to a layer thickness of 150 nanometers. It may also be derived from this diagram that an optimum thickness for the second layer 22 can be found given a prescribed thickness of the first layer 21.
Figure 4 shows the result of a simulation calculation of the fluctuation of structure size as a function of the thickness of the upper oxide layer 11, whereby the thickness of the first layer 21 has again been fixed at 20 nanometers. The first layer 21 in this calculation, however, is composed of SioxNy that corresponds to a refractive index of 1.~ in comparison to the refractive index SioxNy of n equals 2.05. The parameter varied from curve to curve is again the thickness of the second layer 22. The thickness of the second layer 22 is varied between 0 nanometers in curve 41 and 100 nanometers in curve 411. The thickness respectively changes by 10 nanometers with ascending curve numbering, that is curves 42-49, 410 and 411.
photoresist thickness of 1.57~m forms the basis for this calculation.
Figure 5 and Figure 6 show simulation calculations ; 7 :
:' ' : '' '' ~ . . . , , ' : ': , ' . ;.:
.: . '. , : ' , : : ` . . :
Zl[~13;~
,....
for fluctuations of structure size that are based on a first layer 21 composed of SioxNy wherein x equals y equals 0. In this calculation, the cover layer 1 is only composed of the photoresist layer 12. Figure 5 shows the result dependent on the thickness of the photoresist layer 12 for a thickness of the first layer 21 of 5 nanometers, whereby the thickness of the second layer 22 was varied between O nanometers in curve 51 and 112 nanometers in curve 55 by steps of 28 nanometers.
Ascending curve numbering corresponds to greater thickness for curves 52-54. For comparison, Figure 6 shows the fluckuation of structure size as a function of the thickness of the photoresist layer 12 for a thickness of the first layer 21 of O nanometers, whereby the thickness of the second layer 22 was again varied between O nanometers in curve 61 and 112 nanometers in curve 65 in steps of 28 nanometers for curves 62-64. A comparison of the two diagrams shows that an antireflection layer composed of a layer combination of amorphous silicon and of SiO2 ~each having defined thickness) has an extremely good antireflection effect.
Figure 7 shows the result of measurements that document the effectiveness of the method of the present invention. The structure sizes that occur were measured for different batches. The ranges of measurement of the structure sizes are shown in Figure 7 for the individual batches shown as batch numbers. Seventy-five percent of the measuring points lie inside the elongated box. The mean value is shown as a transverse stroke. Batches 11 through 24 were manufactured according to the ', conventional method without an antireflection layer.
Batches 27 through 32.3 as well as 32.6 and 34 were manufactured according to a method without an antireflection layer but with an improved oxide deposition that assures a constant oxide thickness.
Batches 32.4 were manufactured according to the method of the present invention with an antireflection layer that was produced as a 25 nm thick sio2 layer as second layer 22 and as a 2B nm thick Si3N4 layer as first layer 21. The mean quadratic deviation for batches 11 through 24 amounts to 45 nm. The mean quadratic deviation for the batches 27 through 32.3 as well as 32.6 and 34 amounts to 23 nm. The mean quadratic deviation for batches 32.4 and 32.5 that were manufactured according to the method of the invention amounts to 13 nm. The measurements clearly show that a drastic reduction in the fluctuations of the structure size can be achieved with the method of the present invention.
Figure 8 shows the result of a simulation calculation for reflecti~ity. The reflectivity, i.e., the reflected light intensity divided by the applied light intensity, was calculated for a lay~r system that contains a photoresist as the cover layer, Si3N4 as the first layer 21 and sio2 as the second layer 22. The reflectivity is shown as a function of the thickness of the second layer 22. The parameter for the curve family is the thickness of the first layer 21. Curve 81 is calculated for a thickness of 0 nm; curve 82 is calculated for a thickness of 10 nm; curve 83 is calculated for a thickness of 20 nm; curve 84 is ''' ".
~ 8~
calculated for a thickness oE 39 nm; curve 85 is calculated for a thickness of 40 nm; and the curve 86 is calculated for a thickness of 53 nm. For a prescribed thickness of the first layer composed of Si3N4, a thickness of the second layer 22 that provides minimum reflectivity can be read from Figure 8.
Figure 9 shows the result of a further simulation - calculation. The reflectivity (defined as in Figure 8) at a layer structure composed of a cover layer of sio2, of a first layer of Si3N4 and of a second layer of SiO2 on a silicon substrate was calculated as a function of the thickness of the second layer 22. The parameter for the curve family is the thickness of the first layer 21. The curve 91 is based on a thickness of 0 nm; the curve 92 is based on a thickness of 10 nm; the curve 93 is based on a thickness of 20 nm; the curve 94 is based on a thickness of 30 nm; the curve 95 is based on a thickness of 40 nm; and the curve 96 is based on a thickness of 53 nm. The optimum thickness of the second layer 22 at ;; which minimum reflectivity is achieve~d can be derived from Figure 9 for a prescribed thickness of the first layer.
The invention is not limited to the particular details of the apparatus depicted and other modifications and applications are contemplated. Certain other changes may be made in the above described apparatus without departing from the true spirit and scope of the invention herein involvedO It is intended, therefore, that the subject matter in the above depiction shall be interpreted as illustrative and not in a limiting sense.
, 1 0 '' ., ~
BACKGROIJND OF TH~ INVENTION
The present invention is directed to a method for reducing reflection-induced fluctuations of structure size in a cover layer arranged on a layer that contains silicon, amorphous alloys containing silicon and/or silicides, as employed in optical lithography in the manufacture of integrated circuits in a substrate.
In the manufacture of integrated circuits, a semi-conductor layer structure that has a photoresist layer as an uppermost layer is exposed through a photomask.
One part of the light used for the exposure is absorbed in the photoresist layer and another part of the liyht is reflected at the boundary layer of the photoresist layer to the layer laying therebelow. One part penetrates into the layers lying under the photoresist layer and is in turn partially reflected at boundary layers. The light reflected at the layer boundaries proceeds from the backside back into the photoresist layer. An undesired, second exposure of the photoresist layer occurs and is dependent on the interference condition, resulting in intensity flnctuations and fluctuations of structure size.
These fluctuations of structure size were previously compensated for in the manufacture of integrated circuits by either having greater tolerances and, thus, a larger area or by infringing the design rules resulting in reductions in yield.
The use of lambda quarter layers of dielectric material for reducing reflections of dielectric layers on, for example, eyeglasses or objectives is known from ' 8~
the field of optics (see, for example, Max Born, Emil Wolf, Principles of opticS, Pergamon Press, Oxford, 6th Edition, 1980, chapter 1.6; O.S. Heavens, Optical Properties of Thin Solid Films, New York 19854, chapter 4; H.A.M. van den Berg, J.B. van Staden, Antireflection Coatings On Metal Layers For Photolithographical Purposes, J. Appl. Phys. 50 (1979) 1212; L. Mader, D.
Widmann, W.G. Oldham, Reduction Of Line Width Variations In Optical Projection Printing, Lausanne, Switzerland, (1981), page 105).
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for reducing reflection-induced fluctuations of structure size in optical lithography that can be easily utilized in a manufacturing process of integrated circuits and that provides for narrower tolerances and production of finer structures.
This object is inventively achieved by a method of the type initially cited wherein an antireflection layer is applied under the cover layer.
The use of the antireflection layer under the cover layer composed, for example, of photoresist prevents a back-reflection of the light into the photoresist layer.
According to the present invention the antireflection layer is formed of one material, whereby the material has a higher refractive index than the cover layer. In this case, the antireflection layer is applied in a thickness that corresponds to one quarter of the wavelength of the light used in the exposure. Using an antireflection layer composed of Si3N4 layer can produce , ,., . : ' .
crystal defects on a silicon substrate. Further, a silicon oxide layer having a defined thickness may already be present on the silicon substrate. This layer ; has to be first removed or be thickened to a thickness that corresponds to half the wavelength before a lambda quarter layer of, for example, Si3N4 can be deposited.
In this case, an antireflection layer composed of a first layer and of a second layer is used. The first layer lying under the cover layer has a higher refractive index than the cover layer, has a lower refractive index than the first layer and the substrate located under the second layer has higher refractive index than the second layer. Simulation calculations with a computer program known as "SAMP~E" can show that such a combination of two layers effects a reduction in reflection similar to a lambda quarter layer. The first layer, for example, is compos~d of SioxNy~ whereby ~ and y are arbitrary numbers greater than or equal to 0. The second layer is composed, ~or e~ample, of sio2. For example, the substrate is composed of silicon and the cover layer is composed, for example, of sio2 or of photoresist. It is also possible to use a cover layer that is composed of a sio2 layer and of a photoresist layer. In one example, the photoresist layer is the cover layer, a non-absorbent Si3N4 is the first layer, a sio2 layer is th~ second layer and a silicon substrate is the substrate. When the first layer has a thickness between 0.004~/n and 0.0175~/n or 0.242~/n and 0.374~/n, the second layer has a thickness between 0.0~/n and 0.117~/n and, when the first layer has a thickness between 0.175~/n and 0.23~/n, the second ':
3~
.
.
layer has a thickness of less than 0.078~/n, where n is the refractive index of the respective layer and ~ is the wavelength of light employed in the exposure of the ~ optical lithography.
:-~ BRIEF DESCRIPTION OF THE DRAWINGS
The features of the present invention which are believed to be novel, are set forth with particularity . in the appended claims. The invention, together with : further ob~ects and advantages, may best be understood by reference to the following description taken in conjunction with the accompanying drawings, in the several Figures in which like reference numerals ident.ify like elements, and in which:
Figure 1 depicts the layers of an integrated circuit manufactured according to the present invention; and Figures 2-9 are graphs showing results of simulation calculations for the Figure 1 integrated circuit.
DESCRIPTION OF THE PREFERRED EMBODIMENT
Figure 1 shows a substrate 3 which is composed, for example, of silicon, polycrystalline silicon or of silicide. An antireflection layer 2 is applied over the ' substrate 3. The antireflection layer 2 is composed of a first layer 21 and a second layer 22. The first layer 21 is composed, for example, o SioxNy/ whereby x and y .; are arbitrary numbers greater than or equal to zero. The second layer 22 is composed, for example, of SiO2. The .- refractive index can be set with the stoichiometry of the first layer 21. The antireflection layer 2 is followed . by a cover layer 1. The cover layer 1 is composed of an ~ upper oxide layer 11 that is located directly over the :~ 5 ~':, ' 3~2 antireflection layer 2 and of a photoresist layer 12 that is located above the upper oxide layer 11. Thus, the second layer 22 has a lower refractive index than the substrate 3; the first layer 21 has a higher refractive index than the second layer 22; and the upper oxide layer 11 has a lower refractive index than the first layer 21.
Figure 2 shows the result of simulation calculations for the fluctuations of structure size in a structure having the following layer thicknesses: the photoresist layer 12 has a thickness of 1.47~m; the thicknesses of the upper oxide layer 11 as well as the first layer 21 that is composed of Si3N4 are variable; and the thickness of the second layer 22 is 25 nanometers. The fluctuations of structure size are entered in ~m as a function of the thickness of the upper oxide layer in ~m.
The thickness of the first layer 21 changes from curve to curve, whereby a thickness of 0 nanometers provides the basis for curve 201, a thickness of 110 nanometers provides the basis for curve 212 and a thickness that is 10 nanometers greater than that of the preceding curve provides the basis for the remaining curves having ascending numbering, that is curves 202 through 211. It may be derived from the diagram that there is an optimum thickness of the first layer 21 for a prescribed thickness of the second layer 22, this optimum thickness guaranteeing the greatest reliability against fluctuations of structure size due to fluctuations of the thickness of the upper oxide layer 11.
Figure 3 shows the result of simulation calculations of the Eluctuations of structure size as a function of ~ .
. 6 3~
.
the thickness of the upper oxide layer 11, whereby the thickness of the first layer 21 that is composed Si3N4 has been fixed at 20 nanometers and the thickness of the second layer 22 is varied between 0 and 150 nanometers.
The curve 31 corresponds to a thickness of 0 nanometers and the further curves correspond to a thickness that is greater by 10 nanometers for the remain:ing curves having ascending numbering, that is curves 32-39 and 310-316.
The curve 316 therefore corresponds to a layer thickness of 150 nanometers. It may also be derived from this diagram that an optimum thickness for the second layer 22 can be found given a prescribed thickness of the first layer 21.
Figure 4 shows the result of a simulation calculation of the fluctuation of structure size as a function of the thickness of the upper oxide layer 11, whereby the thickness of the first layer 21 has again been fixed at 20 nanometers. The first layer 21 in this calculation, however, is composed of SioxNy that corresponds to a refractive index of 1.~ in comparison to the refractive index SioxNy of n equals 2.05. The parameter varied from curve to curve is again the thickness of the second layer 22. The thickness of the second layer 22 is varied between 0 nanometers in curve 41 and 100 nanometers in curve 411. The thickness respectively changes by 10 nanometers with ascending curve numbering, that is curves 42-49, 410 and 411.
photoresist thickness of 1.57~m forms the basis for this calculation.
Figure 5 and Figure 6 show simulation calculations ; 7 :
:' ' : '' '' ~ . . . , , ' : ': , ' . ;.:
.: . '. , : ' , : : ` . . :
Zl[~13;~
,....
for fluctuations of structure size that are based on a first layer 21 composed of SioxNy wherein x equals y equals 0. In this calculation, the cover layer 1 is only composed of the photoresist layer 12. Figure 5 shows the result dependent on the thickness of the photoresist layer 12 for a thickness of the first layer 21 of 5 nanometers, whereby the thickness of the second layer 22 was varied between O nanometers in curve 51 and 112 nanometers in curve 55 by steps of 28 nanometers.
Ascending curve numbering corresponds to greater thickness for curves 52-54. For comparison, Figure 6 shows the fluckuation of structure size as a function of the thickness of the photoresist layer 12 for a thickness of the first layer 21 of O nanometers, whereby the thickness of the second layer 22 was again varied between O nanometers in curve 61 and 112 nanometers in curve 65 in steps of 28 nanometers for curves 62-64. A comparison of the two diagrams shows that an antireflection layer composed of a layer combination of amorphous silicon and of SiO2 ~each having defined thickness) has an extremely good antireflection effect.
Figure 7 shows the result of measurements that document the effectiveness of the method of the present invention. The structure sizes that occur were measured for different batches. The ranges of measurement of the structure sizes are shown in Figure 7 for the individual batches shown as batch numbers. Seventy-five percent of the measuring points lie inside the elongated box. The mean value is shown as a transverse stroke. Batches 11 through 24 were manufactured according to the ', conventional method without an antireflection layer.
Batches 27 through 32.3 as well as 32.6 and 34 were manufactured according to a method without an antireflection layer but with an improved oxide deposition that assures a constant oxide thickness.
Batches 32.4 were manufactured according to the method of the present invention with an antireflection layer that was produced as a 25 nm thick sio2 layer as second layer 22 and as a 2B nm thick Si3N4 layer as first layer 21. The mean quadratic deviation for batches 11 through 24 amounts to 45 nm. The mean quadratic deviation for the batches 27 through 32.3 as well as 32.6 and 34 amounts to 23 nm. The mean quadratic deviation for batches 32.4 and 32.5 that were manufactured according to the method of the invention amounts to 13 nm. The measurements clearly show that a drastic reduction in the fluctuations of the structure size can be achieved with the method of the present invention.
Figure 8 shows the result of a simulation calculation for reflecti~ity. The reflectivity, i.e., the reflected light intensity divided by the applied light intensity, was calculated for a lay~r system that contains a photoresist as the cover layer, Si3N4 as the first layer 21 and sio2 as the second layer 22. The reflectivity is shown as a function of the thickness of the second layer 22. The parameter for the curve family is the thickness of the first layer 21. Curve 81 is calculated for a thickness of 0 nm; curve 82 is calculated for a thickness of 10 nm; curve 83 is calculated for a thickness of 20 nm; curve 84 is ''' ".
~ 8~
calculated for a thickness oE 39 nm; curve 85 is calculated for a thickness of 40 nm; and the curve 86 is calculated for a thickness of 53 nm. For a prescribed thickness of the first layer composed of Si3N4, a thickness of the second layer 22 that provides minimum reflectivity can be read from Figure 8.
Figure 9 shows the result of a further simulation - calculation. The reflectivity (defined as in Figure 8) at a layer structure composed of a cover layer of sio2, of a first layer of Si3N4 and of a second layer of SiO2 on a silicon substrate was calculated as a function of the thickness of the second layer 22. The parameter for the curve family is the thickness of the first layer 21. The curve 91 is based on a thickness of 0 nm; the curve 92 is based on a thickness of 10 nm; the curve 93 is based on a thickness of 20 nm; the curve 94 is based on a thickness of 30 nm; the curve 95 is based on a thickness of 40 nm; and the curve 96 is based on a thickness of 53 nm. The optimum thickness of the second layer 22 at ;; which minimum reflectivity is achieve~d can be derived from Figure 9 for a prescribed thickness of the first layer.
The invention is not limited to the particular details of the apparatus depicted and other modifications and applications are contemplated. Certain other changes may be made in the above described apparatus without departing from the true spirit and scope of the invention herein involvedO It is intended, therefore, that the subject matter in the above depiction shall be interpreted as illustrative and not in a limiting sense.
, 1 0 '' ., ~
Claims (16)
1. A method for reducing reflection-induced fluctuation of structure size in a cover layer arranged on a layer that contains silicon, amorphous, silicon-containing alloys and/or silicides, the method utilizing optical lithography for the manufacture of integrated circuits in a substrate, comprising the step of applying an antireflection layer under the cover layer.
2. The method according to claim 1, wherein the antireflection layer is entirely composed of one material that has a higher refractive index than the cover layer and is applied in a thickness that is substantially equal to one quarter of the wavelength, .lambda., of light employed in the exposure of the optical lithography.
3. The method according to claim 1, wherein the antireflection layer is applied as a first layer and a second layer, the first layer being located under the cover layer and having a higher refractive index than the cover layer, the second layer being located under the first layer and having a lower refractive index that the first layer and the substrate being located under the second layer and having a higher refractive index than the second layer, the second layer being composed of non-absorbent material.
4. The method according to claim 3, wherein a photoresist layer is the cover layer, a non-absorbent SiOxNy layer, x, y being arbitrary numbers greater than or equal to 0, is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate.
5. The method according to claim 3, wherein a photoresist layer is the cover layer, a non-absorbent Si3N4 is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate; and wherein, when the first layer has a thickness between 0.004.lambda./n and 0.0175.lambda./n or 0.242.lambda./n and 0.374.lambda./n, the second layer has a thickness between 0Ølambda./n and 0.117.lambda./n and, when the first layer has a thickness between 0.175.lambda./n and 0.238.lambda./n, the second layer has a thickness of less than 0.078.lambda./n, where n is the refractive index of the respective layer and .lambda. is the wavelength of light employed in the exposure of the optical lithography.
6. The method according to claim 3, wherein a photoresist layer is the cover layer, an absorbent layer of amorphous silicon is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate.
7. A method for reducing reflection induced fluctuations of structure size in a cover layer of an integrated circuit manufactured by optical lithography, comprising the steps of:
providing a substrate;
applying an antireflection layer of at least one predetermined material over the substrate; and applying the cover layer over the antireflection layer.
providing a substrate;
applying an antireflection layer of at least one predetermined material over the substrate; and applying the cover layer over the antireflection layer.
8. The method according to claim 7, wherein the antireflection layer is entirely composed of one material that has a higher refractive index than the cover layer and is applied in a thickness that is substantially equal to one quarter wavelength of light employed in the exposure.
9. The method according to claim 7, wherein the antireflection layer is applied as a first layer and a second layer, the first layer being located under the cover layer and having a higher refractive index than the cover layer, the second layer being located under the first layer and having a lower refractive index that the first layer and the substrate being located under the second layer and having a higher refractive index than the second layer, the second layer being composed of non-absorbent material.
10. The method according to claim 9, wherein a photoresist layer is the cover layer, a non-absorbent SiOxNy layer, x, y being arbitrary numbers greater than or equal to 0, is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate.
11. The method according to claim 9, wherein a photoresist layer is the cover layer, a non-absorbent Si3N4 is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate; and wherein, when the first layer has a thickness between 0.004.lambda./n and 0.0175.lambda./n or 0.242.lambda./n and 0.374.lambda./n, the second layer has a thickness between 0Ølambda./n and 0.117.lambda./n and, when the first layer has a thickness between 0.175.lambda./n and 0.238.lambda./n, the second layer has a thickness of less than 0.078.lambda./n, where n is the refractive index of the respective layer and .lambda. is the wavelength of light employed in the exposure of the optical lithography.
12. The method according to claim 9, wherein a photoresist layer is the cover layer, an absorbent layer of amorphous silicon is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate.
13. A method for reducing reflection induced fluctuation of structure size in a cover layer of an integrated circuit manufactured by optical lithography, comprising the steps of:
providing a substrate;
applying an antireflection layer having a first layer and a second layer over the substrate;
applying the cover layer over the antireflection layer, the first layer being under the cover layer and having a higher refractive index than the cover layer, the second layer being under the first layer
providing a substrate;
applying an antireflection layer having a first layer and a second layer over the substrate;
applying the cover layer over the antireflection layer, the first layer being under the cover layer and having a higher refractive index than the cover layer, the second layer being under the first layer
14 and having a lower refractive index than the first layer and the substrate being under the second layer and having a higher refractive index than the second layer whereby the second layer is composed of non-absorbent material.
14. The method according to claim 13, wherein a photoresist layer is the cover layer, a non-absorbent SiOxNy layer, x, y being arbitrary numbers greater than or equal to 0, is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate.
14. The method according to claim 13, wherein a photoresist layer is the cover layer, a non-absorbent SiOxNy layer, x, y being arbitrary numbers greater than or equal to 0, is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate.
15. The method according to claim 13, wherein a photoresist layer is the cover layer, a non-absorbent Si3N4 is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate; and wherein, when the first layer has a thickness between 0.004.lambda./n and 0.0175.lambda./n or 0.242.lambda./n and 0.374.lambda./n, the second layer has a thickness between 0Ølambda./n and 0.117.lambda./n and, when the first layer has a thickness between 0.175.lambda./n and 0.238.lambda./n, the second layer has a thickness of less than 0.078.lambda./n, where n is the refractive index of the respective layer and .lambda. is the wavelength of light employed in the exposure of the optical lithography.
16. The method according to claim 13, wherein a photoresist layer is the cover layer, an absorbent layer of amorphous silicon is the first layer, a SiO2 layer is the second layer and a silicon substrate is the substrate.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE3901863 | 1989-01-23 | ||
| DEP3901863.6 | 1989-01-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2008132A1 true CA2008132A1 (en) | 1990-07-23 |
Family
ID=6372603
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2008132 Abandoned CA2008132A1 (en) | 1989-01-23 | 1990-01-19 | Method for reducing reflection-induced fluctuations of structure size in a cover layer in the optical lithography used in the manufacture of integrated circuits in a substrate |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0379924A3 (en) |
| JP (1) | JPH02244153A (en) |
| CA (1) | CA2008132A1 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5219788A (en) * | 1991-02-25 | 1993-06-15 | Ibm Corporation | Bilayer metallization cap for photolithography |
| JPH09326360A (en) * | 1996-03-07 | 1997-12-16 | Lucent Technol Inc | Fabrication of device |
| JP2000506285A (en) * | 1996-03-07 | 2000-05-23 | クラリアント・インターナショナル・リミテッド | Heat treatment method for positive photoresist composition |
| US6133618A (en) * | 1997-08-14 | 2000-10-17 | Lucent Technologies Inc. | Semiconductor device having an anti-reflective layer and a method of manufacture thereof |
| US6171764B1 (en) * | 1998-08-22 | 2001-01-09 | Chia-Lin Ku | Method for reducing intensity of reflected rays encountered during process of photolithography |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4414314A (en) * | 1982-02-26 | 1983-11-08 | International Business Machines Corporation | Resolution in optical lithography |
| JPS6054433A (en) * | 1983-09-05 | 1985-03-28 | Hitachi Ltd | Forming method for pattern |
| US4529685A (en) * | 1984-03-02 | 1985-07-16 | Advanced Micro Devices, Inc. | Method for making integrated circuit devices using a layer of indium arsenide as an antireflective coating |
-
1990
- 1990-01-15 EP EP19900100749 patent/EP0379924A3/en not_active Withdrawn
- 1990-01-19 CA CA 2008132 patent/CA2008132A1/en not_active Abandoned
- 1990-01-19 JP JP2010476A patent/JPH02244153A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP0379924A2 (en) | 1990-08-01 |
| JPH02244153A (en) | 1990-09-28 |
| EP0379924A3 (en) | 1990-11-07 |
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