CA1299289C - Integrated circuit with memory self-test - Google Patents

Integrated circuit with memory self-test

Info

Publication number
CA1299289C
CA1299289C CA000548276A CA548276A CA1299289C CA 1299289 C CA1299289 C CA 1299289C CA 000548276 A CA000548276 A CA 000548276A CA 548276 A CA548276 A CA 548276A CA 1299289 C CA1299289 C CA 1299289C
Authority
CA
Canada
Prior art keywords
test
word
integrated circuit
memory
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA000548276A
Other languages
English (en)
French (fr)
Inventor
Duane Rodney Aadsen
Sunil Kumar Jain
Charles Eugene Stroud
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/914,411 external-priority patent/US4872168A/en
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Application granted granted Critical
Publication of CA1299289C publication Critical patent/CA1299289C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
CA000548276A 1986-10-02 1987-09-30 Integrated circuit with memory self-test Expired - Fee Related CA1299289C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US914,411 1986-10-02
US06/914,411 US4872168A (en) 1986-10-02 1986-10-02 Integrated circuit with memory self-test

Publications (1)

Publication Number Publication Date
CA1299289C true CA1299289C (en) 1992-04-21

Family

ID=25434325

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000548276A Expired - Fee Related CA1299289C (en) 1986-10-02 1987-09-30 Integrated circuit with memory self-test

Country Status (2)

Country Link
KR (1) KR900008638B1 (ko)
CA (1) CA1299289C (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002100738A (ja) * 2000-09-25 2002-04-05 Toshiba Corp 半導体集積回路及びテスト容易化回路の自動挿入方法

Also Published As

Publication number Publication date
KR880005622A (ko) 1988-06-29
KR900008638B1 (ko) 1990-11-26

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Legal Events

Date Code Title Description
MKLA Lapsed