CA1259671C - - Google Patents
Info
- Publication number
- CA1259671C CA1259671C CA 522305 CA522305A CA1259671C CA 1259671 C CA1259671 C CA 1259671C CA 522305 CA522305 CA 522305 CA 522305 A CA522305 A CA 522305A CA 1259671 C CA1259671 C CA 1259671C
- Authority
- CA
- Canada
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318555—Control logic
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318558—Addressing or selecting of subparts of the device under test
- G01R31/318561—Identification of the subpart
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA000572477A CA1259671A (en) | 1985-11-07 | 1988-07-19 | Flip-flop in imbedded test system for vlsi |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US79604785A | 1985-11-07 | 1985-11-07 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000572477A Division CA1259671A (en) | 1985-11-07 | 1988-07-19 | Flip-flop in imbedded test system for vlsi |
Publications (2)
Publication Number | Publication Date |
---|---|
CA1254669A CA1254669A (en) | 1989-05-23 |
CA1259671C true CA1259671C (nl) | 1989-09-19 |
Family
ID=25167132
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000522305A Expired CA1254669A (en) | 1985-11-07 | 1986-11-06 | FLEXIBLE VERIFICATION DEVICE INCORPORATED IN A VLSI CIRCUIT |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0228156A3 (nl) |
JP (1) | JPS62113075A (nl) |
AU (1) | AU590012B2 (nl) |
CA (1) | CA1254669A (nl) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6329276A (ja) * | 1986-07-23 | 1988-02-06 | Hitachi Ltd | 論理lsi |
IT1204915B (it) * | 1987-03-11 | 1989-03-10 | Montedison Spa | Derivatori per sistemi asincronici |
EP0292116A3 (en) * | 1987-05-05 | 1990-08-01 | Control Data Corporation | Test system for vlsi circuits |
US5153882A (en) * | 1990-03-29 | 1992-10-06 | National Semiconductor Corporation | Serial scan diagnostics apparatus and method for a memory device |
DE102006011706B4 (de) * | 2006-03-14 | 2011-04-07 | Qimonda Ag | Halbleiter-Bauelement, sowie Halbleiter-Bauelement-Test-Verfahren |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4244048A (en) * | 1978-12-29 | 1981-01-06 | International Business Machines Corporation | Chip and wafer configuration and testing method for large-scale-integrated circuits |
US4357703A (en) * | 1980-10-09 | 1982-11-02 | Control Data Corporation | Test system for LSI circuits resident on LSI chips |
JPS6013266A (ja) * | 1983-07-04 | 1985-01-23 | Hitachi Ltd | 診断容易化回路 |
GB8432458D0 (en) * | 1984-12-21 | 1985-02-06 | Plessey Co Plc | Integrated circuits |
GB8432533D0 (en) * | 1984-12-21 | 1985-02-06 | Plessey Co Plc | Integrated circuits |
DE3687407T2 (de) * | 1985-10-15 | 1993-06-24 | Sony Corp | Logische schaltung mit zusammengeschalteten mehrtorflip-flops. |
-
1986
- 1986-10-08 EP EP86307756A patent/EP0228156A3/en not_active Withdrawn
- 1986-10-14 AU AU63955/86A patent/AU590012B2/en not_active Ceased
- 1986-11-06 CA CA000522305A patent/CA1254669A/en not_active Expired
- 1986-11-06 JP JP61264868A patent/JPS62113075A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0228156A3 (en) | 1989-06-07 |
CA1254669A (en) | 1989-05-23 |
EP0228156A2 (en) | 1987-07-08 |
AU6395586A (en) | 1987-05-14 |
JPS62113075A (ja) | 1987-05-23 |
AU590012B2 (en) | 1989-10-26 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MKEX | Expiry |