CA1204370A - Method of forming a shallow and high conductivity boron doped layer in silicon - Google Patents
Method of forming a shallow and high conductivity boron doped layer in siliconInfo
- Publication number
- CA1204370A CA1204370A CA000435050A CA435050A CA1204370A CA 1204370 A CA1204370 A CA 1204370A CA 000435050 A CA000435050 A CA 000435050A CA 435050 A CA435050 A CA 435050A CA 1204370 A CA1204370 A CA 1204370A
- Authority
- CA
- Canada
- Prior art keywords
- approximately
- substrate
- kev
- silicon
- implant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010703 silicon Substances 0.000 title claims abstract description 35
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 35
- 238000000034 method Methods 0.000 title claims abstract description 31
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 title claims abstract description 20
- 229910052796 boron Inorganic materials 0.000 title claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 239000007943 implant Substances 0.000 claims abstract description 42
- OKZIUSOJQLYFSE-UHFFFAOYSA-N difluoroboron Chemical compound F[B]F OKZIUSOJQLYFSE-UHFFFAOYSA-N 0.000 claims abstract description 35
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 34
- 238000000137 annealing Methods 0.000 claims abstract description 18
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 28
- 239000007788 liquid Substances 0.000 claims description 15
- 229910052757 nitrogen Inorganic materials 0.000 claims description 14
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 2
- 229910052754 neon Inorganic materials 0.000 claims description 2
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 claims description 2
- 230000004913 activation Effects 0.000 abstract description 24
- 239000000463 material Substances 0.000 description 9
- 150000002500 ions Chemical class 0.000 description 6
- 239000013078 crystal Substances 0.000 description 5
- 239000002019 doping agent Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000004075 alteration Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/024—Defect control-gettering and annealing
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- General Physics & Mathematics (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Health & Medical Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Bipolar Transistors (AREA)
Abstract
A METHOD OF FORMING A SHALLOW AND HIGH
CONDUCTIVITY BORON DOPED LAYER IN SILICON
ABSTRACT OF THE DISCLOSURE
Implanting, with low energy (e.g. 75 Kev and below), a dose of boron difluoride (BF2) into an area on a silicon substrate which is post-damaged or pre-damaged by a silicon implant so that annealing, or activation, can be accomplished at temperatures in the range of 550°C to 900°C.
CONDUCTIVITY BORON DOPED LAYER IN SILICON
ABSTRACT OF THE DISCLOSURE
Implanting, with low energy (e.g. 75 Kev and below), a dose of boron difluoride (BF2) into an area on a silicon substrate which is post-damaged or pre-damaged by a silicon implant so that annealing, or activation, can be accomplished at temperatures in the range of 550°C to 900°C.
Description
A METHOD OF FORMING A SI~ALLOW AND HIGH
CONDUCTIVITY BORON DOPED LAYER IN SILICON
BACKGROUND OF THE INVENTION
- - _ The trend toward smaller geometry devices in the fabrication of very large scale or very high speed integrated circuits necessitates the use of shallower junctions. For example, in MOS transistors a reduction in source and drain junction depth by a factor of 8 is required to shrink the gate length by a factor of 2 at a given gate oxide thickness and a given substrate doping level.
In the formation of doped layers, which are utilized to form junctions, a common method utilized is to implant a dose of the dopant material into the substrate and then anneal the substrate to activate the doped layer.
Implanting is performed by stripping electrons from molecules of the doping material to form ions and accelerating the ions at the substrate by way of a high energy ion beam. As the ions strike the substrate, atoms of the substrate material are moved out of the crystal lattice, or formation. Generally, it is desirable to disturb the position of enough of the substrate atoms in the region to be doped so that an amorphous layer is formed.
Once the dopant material is implanted in the substrate, the substrate is heated (annealed) to a temperature sufficient to reform the material into a crystalline structure with the ions of the doping material occupying the crystal lattice at regular intervals. Each ion of the doping material which is properly positioned in the crystal lattice is referred to as activated. When all of the atoms of the original substrate material are reformed into a crystal lattice and all, or substantially all, of the ions of the doping material are properly ~2043qo positioned in the lattice the doped layer is completely activated. Generally, the amount of activation depends upon the temperature utilized in the annealing process and the length of time the substrate is annealed. The amount of activation is measured by measuring the sheet resistivity of the implanted layer; maximum or nearly maximum activation is signaled by a decrease and then leveling of resistivity as a function of annealing temperature or annealing time at a given temperature. If the doped layer in the substrate is not rendered completely amorphous by the ion implantation, that is some of the atoms of the substrate are still in a partial crystal lattice, the lattice must be broken down and reformed during the annealing process and, in such case, higher temperatures are required for adequate activation.
However, because of the smaller geometry devices and the need to reduce processing costs, it is desirable to reduce the annealing temperatures as much as possible.
SUMMARY OF THE INVENTION
The present invention pertains to a method of forming a relatively high conductivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate by 25 implanting in the substrate, with an energy less than approximately 75 Kev, a dose of boron difluoride in the range of approximately 6xlO14/cm2 to 5xlO15/cm2, post-damaging or pre-damaging the implanted area of the substrate with an implant such that the damage is approxi-mately equivalent to the damage produced by a lxlO15/cm2dose of silicon implanted at an energy of approximately 100 Kev; and annealing the substrate at a temperature in the range of approximately 675C to 990C. When the implanted area is post-damaged, i~e. after the boron difluoride implant, the range of annealing temperatures can be extended to as low as 550C.
~2043~0 It is an object of the present invention to provide a new and improved method of forming a relatively high conductivity, shallow boron doped layer in a silicon substrate.
It is a fur~her object of the present invention to provide a new and improved method of forming a relatively high conductivity, shallow boron doped layer requiring relatively low annealing, or activation, temperatures.
It is a further object of the present invention to provide a new and improved method of forming a relatively high conductivity, shallow boron doped layer wherein boron difluoride is used for doping at a relatively low energy.
These and other objects of this invention will become apparent to those skilled in the art upon consideration of the accompanying specification, claims and drawing.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGURE 1 is a graph of the sheet resistance of the doped layer versus the annealing temperature for five different methods of producing the doped layer using 40 Kev implant energy; and FIGURE 2 is a graph similar to FIG. 1 using 28 Kev implant energy.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
In the novel methods embodying the present invention, boron difluoride (BF2) in the form of singly ionized boron difluoride molecules (BF2+) is used as the dopant to produce a relatively high conductivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate. A boron difluoride implant is used to produce P-type shallow layers in a silicon substrate for two reasons. One, by using boron difluoride the shallow boron implant distribution, which depends on the mass ratio of ~204370 boron to boron difluoride (11/49 = 0.224), can be produced at a reasonably high accelerator voltage with a stable ion beam. Two, higher throughput and greater savings in capital investment can be realized due to the higher beam current achievable with boron difluoride compared to boron, i.e. greater than 5:1.
It is known by those skilled in the art that the critical dose for the formation of an amorphous layer in a silicon substrate is below lxl015/cm2 for a 150 Kev boron diEluoride implant. This critical dose is the implant dose above which an amorphous layer is formed. It is also known by those skilled in the art that the lxl015/cm2 dose of boron difluoride implanted at 150 Kev can be activated to the maximum level at temperatures greater than or equal to 650C, resulting in a doped layer greater than 0.3 microns thick. For small geometry devices, however, such as submicron MOS transistors, boron doped layers shallower than 0.3 microns are required. To produce the shallower layers lower energy implants and/or lower activation temperatures are needed. To achieve a final implant depth of less than 0.3 microns the implant energy, using boron difluoride as the dopant, must be limited to less than about 75 Kev. Since the critical dose of dopant required for the formation of an amorphous layer is normally reduced as the implant energy is reduced, one skilled in the art would expect that a lower energy boron difluoride implant could also be activated to the maximum level with a temperature greater than or equal to 650C.
Unexpectedly, it was found through experimentation that lxl015/cm2 doses of boron difluoride implanted at 28 Kev and 40 Kev were not activated to the maximum level at less tha~ or equal to 800C. Curve A of FIG. 1 illus-trates the sheet resistance versus the anneal temperature for a 2xl015Jcm2 dose of boron difluoride implanted at 40 Kev. Curve A of FIG. 2 illustrates the sheet resistance versus the anneal temperature for a lxl015/cm2 dose of ~Z04370 boron difluoride implanted at 28 Kev. For each implant the sheet resistivity is about 290 ohms per cm2 at 800C
annealing temperature. This value is greater than those obtained for the 900C anneal indicating activation is not maximized at 800C.
Since increased activation reduces the sheet resistance, from these graphs it can be seen that decreasing the implant energy from 150 Kev to 2~ Kev or 40 Kev decreased the amount of activation at a specific annealing temperature. One skilled in the art would then expect that too much damage is created at the reduced implant energy levels to achieve the maximum activation.
Thus, if additional damage, greater than that created by the boron difluoride implant alone, were produced by additional processing of the substrate, the activation would be adversely effected. This assumption was confirmed by implanting a lxl015/cm2 dose of boron difluoride at 28 Kev into a silicon layer, which was pre-damaged by a lxl015/cm2 dose of silicon implanted at 100 Kev, and annealing at 800C and 900C as indicated by curve B of FIG. 2. A comparison of curves B and A of FIG. 2 quickly illustrates that the additional damage caused by the pre-damaged implant reduced the amount of activation, e.g.
350 ohms per cm~ versus 290 ohms per cm2 for the 800C, 10 minute anneal. Unexpectedly a 2xl015/cm2 dose of boron difluoride implanted at a 40 Kev energy into a substrate pre-damaged by a lxl015/cm2 dose of silicon implanted at 100 Kev (curve B of FIG. 1) gave better activation than the boron difluoride implanted into an undamaged substrate (curve A of FIG. 1). However, maximum activation was not achieved. In both of the pre-damaged experiments (curves B
of FIGS. 1 and 2) the silicon implant was performed at room temperature.
In a second procedure a pre-damaged layer was created in a silicon substrate by implanting a lxl015/cm2 dose of 120437~
silicon at an energy of 100 Kev and at the temperature of liquid nitrogen. A 2xlOl5/cm2 dose of boron difluoride was then implanted at 40 Kev at room temperature and samples were annealed at 600C, 700C, 800C and 900C. The results of this procedure are depicted by curve C of FIG.
l. From a comparison of curve C with curves A and B of FIG. 1 it can be seen that the activation was further improved, particularly for anneals at 700C and 800C. In this procedure the activation was improved by more damage since the silicon implant at liquid nitroyen temperature causes more damage than the silicon implant at room temperature (curve B of FIG. 1).
It is known to those skilled in the art that a damaging implant subsequent to the main doping implant (post-damage) creates more damage than the pre-damaged implants discussed above. Thus, one skilled in the art would expect: (l) better or at least equal activation if the damaging implant at liquid nitrogen temperature is performed after the boron difluoride implant7 and (2) better activation by the post-darnage at liquid nitrogen temperature than at room temperature. In a third procedure a substrate having a 2xlOl5/cm2 dose of boron difluoride implanted at 40 Kev was post-damaged by a lxlO15/cm2 dose of silicon implanted at 100 Kev at liquid nitrogen temperature and annealed at 600C, 700C and 800C. Curve D of FIG. l illustrates the results of this procedure. For anneals at 700C and 800C better activation was achieved by the post-damage at liquid nitrogen temperature than at room temperature (curve C of FIG. l). However, the post-damage at liquid nitrogen temperature gave substantiallyworse activation than the pre-damage at liquid nitrogen temperature for anneals of 600C.
In a still further procedure, a substrate having a 2xlO15/cm2 dose of boron difluoride implanted at 40 Kev was post-damaged by a lxlO15/cm2 dose of silicon implanted at lO0 Kev, both implants at room temperature. This post-damaged substrate was annealed at 550C, 600C, 700C and 800Cr the results being illustrated by curve E of FIG. 1.
Unexpectedly, the post-damage at rooln temperature gave better activation than the post-damage at liquid nitrogen temperature for anneals at 550C and 600C. For the anneal at 550C the room temperature post-damaged sample gave 640 ohms per cm2 after a 10 minute anneal and 197 ohms per cm2 after a l hour anneal. For the anneal at 600C the sample pre-damaged at liquid nitrogen temperature gave 300 ohms per cm2 after a 10 minute anneal and 187 ohms per cm2 after a 30 minute anneal.
The as implanted boron profile is essentially preserved for all of the room temperature post-damaged samples for all of the anneals reported here (550C, 600C, 700C and 800C for lO minutes, and 550C for l hour). The sheet resistance values indicate that maximum activation was realized by post-damage at room temperature for anneals at 550C to B00C, by pre-damage at liquid nitrogen temperature for anneals at 600C to 800CI and by post-damage at liquid nitrogen temperature for anneals at 700C and 800C. In a final procedure, a substrate having a 2xlOl5/cm2 dose of boron difluoride implanted at 28 Kev was post-damaged with a lxlOl5/cm2 dose of silicon implanted at 100 Kev. These substrates were annealed at 700C and 800C for lO minutes. These post-damaged substrates also gave nearly maximum activation, as illustrated by curve C of FIG. 2.
Thus, a method of forming a relatively high conduc-tivity boron doped layer less than approximately 0.3microns thick in a silicon substrate is disclosed. While all of the damaging implants utilized herein were silicon, it will be understood by those of skill in the art that other types of implant, such as neon and argon might be utilized. Further, any low energy, 75 Kev and below, implants of boron difluoride will provide the desired shallow boron doped layers with high electrical activity.
Also, while doses of lxlO15/cm2 and 2xlO15/cm2 were utilized herein, doses in the range of approxima~ely 6xlO14/cm2 to 5xlO15/cm2 will provide sufficiently shallow layers. Similarly, although the damaging implant disclosed herein is a lxlO15/cm2 dose of silicon implanted at an energy of approximately 100 Kev, it will be understood that alterations or adjustments in the size of the dose and amount of energy would be well within the purview of those skilled in the art and all such alterations and changes are considered to be within the teachings herein if the damage is approximately equivalent.
While I have shown and described specific embodiments of this invention, further modifications and improvements will occur to those skilled in the art. I desire it to be understood, therefore, that this invention is not limited to the particular forms shown and I intend in the appended claims to cover all modifications which do not depart from the spirit and scope of this invention.
CONDUCTIVITY BORON DOPED LAYER IN SILICON
BACKGROUND OF THE INVENTION
- - _ The trend toward smaller geometry devices in the fabrication of very large scale or very high speed integrated circuits necessitates the use of shallower junctions. For example, in MOS transistors a reduction in source and drain junction depth by a factor of 8 is required to shrink the gate length by a factor of 2 at a given gate oxide thickness and a given substrate doping level.
In the formation of doped layers, which are utilized to form junctions, a common method utilized is to implant a dose of the dopant material into the substrate and then anneal the substrate to activate the doped layer.
Implanting is performed by stripping electrons from molecules of the doping material to form ions and accelerating the ions at the substrate by way of a high energy ion beam. As the ions strike the substrate, atoms of the substrate material are moved out of the crystal lattice, or formation. Generally, it is desirable to disturb the position of enough of the substrate atoms in the region to be doped so that an amorphous layer is formed.
Once the dopant material is implanted in the substrate, the substrate is heated (annealed) to a temperature sufficient to reform the material into a crystalline structure with the ions of the doping material occupying the crystal lattice at regular intervals. Each ion of the doping material which is properly positioned in the crystal lattice is referred to as activated. When all of the atoms of the original substrate material are reformed into a crystal lattice and all, or substantially all, of the ions of the doping material are properly ~2043qo positioned in the lattice the doped layer is completely activated. Generally, the amount of activation depends upon the temperature utilized in the annealing process and the length of time the substrate is annealed. The amount of activation is measured by measuring the sheet resistivity of the implanted layer; maximum or nearly maximum activation is signaled by a decrease and then leveling of resistivity as a function of annealing temperature or annealing time at a given temperature. If the doped layer in the substrate is not rendered completely amorphous by the ion implantation, that is some of the atoms of the substrate are still in a partial crystal lattice, the lattice must be broken down and reformed during the annealing process and, in such case, higher temperatures are required for adequate activation.
However, because of the smaller geometry devices and the need to reduce processing costs, it is desirable to reduce the annealing temperatures as much as possible.
SUMMARY OF THE INVENTION
The present invention pertains to a method of forming a relatively high conductivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate by 25 implanting in the substrate, with an energy less than approximately 75 Kev, a dose of boron difluoride in the range of approximately 6xlO14/cm2 to 5xlO15/cm2, post-damaging or pre-damaging the implanted area of the substrate with an implant such that the damage is approxi-mately equivalent to the damage produced by a lxlO15/cm2dose of silicon implanted at an energy of approximately 100 Kev; and annealing the substrate at a temperature in the range of approximately 675C to 990C. When the implanted area is post-damaged, i~e. after the boron difluoride implant, the range of annealing temperatures can be extended to as low as 550C.
~2043~0 It is an object of the present invention to provide a new and improved method of forming a relatively high conductivity, shallow boron doped layer in a silicon substrate.
It is a fur~her object of the present invention to provide a new and improved method of forming a relatively high conductivity, shallow boron doped layer requiring relatively low annealing, or activation, temperatures.
It is a further object of the present invention to provide a new and improved method of forming a relatively high conductivity, shallow boron doped layer wherein boron difluoride is used for doping at a relatively low energy.
These and other objects of this invention will become apparent to those skilled in the art upon consideration of the accompanying specification, claims and drawing.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGURE 1 is a graph of the sheet resistance of the doped layer versus the annealing temperature for five different methods of producing the doped layer using 40 Kev implant energy; and FIGURE 2 is a graph similar to FIG. 1 using 28 Kev implant energy.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
In the novel methods embodying the present invention, boron difluoride (BF2) in the form of singly ionized boron difluoride molecules (BF2+) is used as the dopant to produce a relatively high conductivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate. A boron difluoride implant is used to produce P-type shallow layers in a silicon substrate for two reasons. One, by using boron difluoride the shallow boron implant distribution, which depends on the mass ratio of ~204370 boron to boron difluoride (11/49 = 0.224), can be produced at a reasonably high accelerator voltage with a stable ion beam. Two, higher throughput and greater savings in capital investment can be realized due to the higher beam current achievable with boron difluoride compared to boron, i.e. greater than 5:1.
It is known by those skilled in the art that the critical dose for the formation of an amorphous layer in a silicon substrate is below lxl015/cm2 for a 150 Kev boron diEluoride implant. This critical dose is the implant dose above which an amorphous layer is formed. It is also known by those skilled in the art that the lxl015/cm2 dose of boron difluoride implanted at 150 Kev can be activated to the maximum level at temperatures greater than or equal to 650C, resulting in a doped layer greater than 0.3 microns thick. For small geometry devices, however, such as submicron MOS transistors, boron doped layers shallower than 0.3 microns are required. To produce the shallower layers lower energy implants and/or lower activation temperatures are needed. To achieve a final implant depth of less than 0.3 microns the implant energy, using boron difluoride as the dopant, must be limited to less than about 75 Kev. Since the critical dose of dopant required for the formation of an amorphous layer is normally reduced as the implant energy is reduced, one skilled in the art would expect that a lower energy boron difluoride implant could also be activated to the maximum level with a temperature greater than or equal to 650C.
Unexpectedly, it was found through experimentation that lxl015/cm2 doses of boron difluoride implanted at 28 Kev and 40 Kev were not activated to the maximum level at less tha~ or equal to 800C. Curve A of FIG. 1 illus-trates the sheet resistance versus the anneal temperature for a 2xl015Jcm2 dose of boron difluoride implanted at 40 Kev. Curve A of FIG. 2 illustrates the sheet resistance versus the anneal temperature for a lxl015/cm2 dose of ~Z04370 boron difluoride implanted at 28 Kev. For each implant the sheet resistivity is about 290 ohms per cm2 at 800C
annealing temperature. This value is greater than those obtained for the 900C anneal indicating activation is not maximized at 800C.
Since increased activation reduces the sheet resistance, from these graphs it can be seen that decreasing the implant energy from 150 Kev to 2~ Kev or 40 Kev decreased the amount of activation at a specific annealing temperature. One skilled in the art would then expect that too much damage is created at the reduced implant energy levels to achieve the maximum activation.
Thus, if additional damage, greater than that created by the boron difluoride implant alone, were produced by additional processing of the substrate, the activation would be adversely effected. This assumption was confirmed by implanting a lxl015/cm2 dose of boron difluoride at 28 Kev into a silicon layer, which was pre-damaged by a lxl015/cm2 dose of silicon implanted at 100 Kev, and annealing at 800C and 900C as indicated by curve B of FIG. 2. A comparison of curves B and A of FIG. 2 quickly illustrates that the additional damage caused by the pre-damaged implant reduced the amount of activation, e.g.
350 ohms per cm~ versus 290 ohms per cm2 for the 800C, 10 minute anneal. Unexpectedly a 2xl015/cm2 dose of boron difluoride implanted at a 40 Kev energy into a substrate pre-damaged by a lxl015/cm2 dose of silicon implanted at 100 Kev (curve B of FIG. 1) gave better activation than the boron difluoride implanted into an undamaged substrate (curve A of FIG. 1). However, maximum activation was not achieved. In both of the pre-damaged experiments (curves B
of FIGS. 1 and 2) the silicon implant was performed at room temperature.
In a second procedure a pre-damaged layer was created in a silicon substrate by implanting a lxl015/cm2 dose of 120437~
silicon at an energy of 100 Kev and at the temperature of liquid nitrogen. A 2xlOl5/cm2 dose of boron difluoride was then implanted at 40 Kev at room temperature and samples were annealed at 600C, 700C, 800C and 900C. The results of this procedure are depicted by curve C of FIG.
l. From a comparison of curve C with curves A and B of FIG. 1 it can be seen that the activation was further improved, particularly for anneals at 700C and 800C. In this procedure the activation was improved by more damage since the silicon implant at liquid nitroyen temperature causes more damage than the silicon implant at room temperature (curve B of FIG. 1).
It is known to those skilled in the art that a damaging implant subsequent to the main doping implant (post-damage) creates more damage than the pre-damaged implants discussed above. Thus, one skilled in the art would expect: (l) better or at least equal activation if the damaging implant at liquid nitrogen temperature is performed after the boron difluoride implant7 and (2) better activation by the post-darnage at liquid nitrogen temperature than at room temperature. In a third procedure a substrate having a 2xlOl5/cm2 dose of boron difluoride implanted at 40 Kev was post-damaged by a lxlO15/cm2 dose of silicon implanted at 100 Kev at liquid nitrogen temperature and annealed at 600C, 700C and 800C. Curve D of FIG. l illustrates the results of this procedure. For anneals at 700C and 800C better activation was achieved by the post-damage at liquid nitrogen temperature than at room temperature (curve C of FIG. l). However, the post-damage at liquid nitrogen temperature gave substantiallyworse activation than the pre-damage at liquid nitrogen temperature for anneals of 600C.
In a still further procedure, a substrate having a 2xlO15/cm2 dose of boron difluoride implanted at 40 Kev was post-damaged by a lxlO15/cm2 dose of silicon implanted at lO0 Kev, both implants at room temperature. This post-damaged substrate was annealed at 550C, 600C, 700C and 800Cr the results being illustrated by curve E of FIG. 1.
Unexpectedly, the post-damage at rooln temperature gave better activation than the post-damage at liquid nitrogen temperature for anneals at 550C and 600C. For the anneal at 550C the room temperature post-damaged sample gave 640 ohms per cm2 after a 10 minute anneal and 197 ohms per cm2 after a l hour anneal. For the anneal at 600C the sample pre-damaged at liquid nitrogen temperature gave 300 ohms per cm2 after a 10 minute anneal and 187 ohms per cm2 after a 30 minute anneal.
The as implanted boron profile is essentially preserved for all of the room temperature post-damaged samples for all of the anneals reported here (550C, 600C, 700C and 800C for lO minutes, and 550C for l hour). The sheet resistance values indicate that maximum activation was realized by post-damage at room temperature for anneals at 550C to B00C, by pre-damage at liquid nitrogen temperature for anneals at 600C to 800CI and by post-damage at liquid nitrogen temperature for anneals at 700C and 800C. In a final procedure, a substrate having a 2xlOl5/cm2 dose of boron difluoride implanted at 28 Kev was post-damaged with a lxlOl5/cm2 dose of silicon implanted at 100 Kev. These substrates were annealed at 700C and 800C for lO minutes. These post-damaged substrates also gave nearly maximum activation, as illustrated by curve C of FIG. 2.
Thus, a method of forming a relatively high conduc-tivity boron doped layer less than approximately 0.3microns thick in a silicon substrate is disclosed. While all of the damaging implants utilized herein were silicon, it will be understood by those of skill in the art that other types of implant, such as neon and argon might be utilized. Further, any low energy, 75 Kev and below, implants of boron difluoride will provide the desired shallow boron doped layers with high electrical activity.
Also, while doses of lxlO15/cm2 and 2xlO15/cm2 were utilized herein, doses in the range of approxima~ely 6xlO14/cm2 to 5xlO15/cm2 will provide sufficiently shallow layers. Similarly, although the damaging implant disclosed herein is a lxlO15/cm2 dose of silicon implanted at an energy of approximately 100 Kev, it will be understood that alterations or adjustments in the size of the dose and amount of energy would be well within the purview of those skilled in the art and all such alterations and changes are considered to be within the teachings herein if the damage is approximately equivalent.
While I have shown and described specific embodiments of this invention, further modifications and improvements will occur to those skilled in the art. I desire it to be understood, therefore, that this invention is not limited to the particular forms shown and I intend in the appended claims to cover all modifications which do not depart from the spirit and scope of this invention.
Claims (11)
1. A method of forming a relatively high conduc-tivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate comprising the steps of:
implanting in the substrate with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2;
damaging the implanted area of the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev; and annealing the substrate at a temperature in the range of approximately 675°C to 900°C.
implanting in the substrate with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2;
damaging the implanted area of the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev; and annealing the substrate at a temperature in the range of approximately 675°C to 900°C.
2. A method as claimed in claim 1 wherein the damaging implant is performed at approximately room temperature.
3. A method as claimed in claim 1 wherein the damaging implant is performed at approximately liquid nitrogen temperature.
4. A method as claimed in claim 1 wherein the boron difluoride implant is a dose of approximately 2x1015/cm2 implanted at an energy of approximately 40 Kev.
5. A method as claimed in claim 1 wherein the annealing is performed for at least approximately 10 minutes.
6. A method as claimed in claim 1 wherein the damaging implant is chosen from the group consisting of silicon, argon and neon.
7. A method as claimed in claim 6 wherein the damaging implant is silicon.
8. A method as claimed in claim 1 wherein an energy of approximately 40 Kev is used to implant the dose of boron difluoride.
9. A method of forming a relatively high conductivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate comprising the steps of:
implanting in the substrate with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2; and then damaging the implanted area of the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev at approximately room temperature; and then annealing the substrate at a temperature in the range of approximately 550°C to 900°C.
implanting in the substrate with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2; and then damaging the implanted area of the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev at approximately room temperature; and then annealing the substrate at a temperature in the range of approximately 550°C to 900°C.
10. A method of forming a relatively high conductivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate comprising the steps of:
implanting in the substrate with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2; and then damaging the implanted area of the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev at a temperature of approximately liquid nitrogen; and then annealing the substrate at a temperature in the range of approximately 675°C to 900°C.
implanting in the substrate with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2; and then damaging the implanted area of the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev at a temperature of approximately liquid nitrogen; and then annealing the substrate at a temperature in the range of approximately 675°C to 900°C.
11. A method of forming a relatively high conduc-tivity boron doped layer less than approximately 0.3 microns thick in a silicon substrate comprising the steps of:
damaging an area in the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev at a temperature of approximately liquid nitrogen; and then implanting in the damaged area with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2; and then annealing the substrate at a temperature in the range of approximately 600°C to 900°C.
damaging an area in the substrate with an implant an amount approximately equivalent to the damage produced by a dose of silicon approximately 1x1015/cm2 implanted at an energy of approximately 100 Kev at a temperature of approximately liquid nitrogen; and then implanting in the damaged area with an energy less than approximately 75 Kev a dose of boron difluoride in the range of approximately 6x1014/cm2 to 5x1015/cm2; and then annealing the substrate at a temperature in the range of approximately 600°C to 900°C.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US434,677 | 1982-10-15 | ||
| US06/434,677 US4456489A (en) | 1982-10-15 | 1982-10-15 | Method of forming a shallow and high conductivity boron doped layer in silicon |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1204370A true CA1204370A (en) | 1986-05-13 |
Family
ID=23725212
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000435050A Expired CA1204370A (en) | 1982-10-15 | 1983-08-22 | Method of forming a shallow and high conductivity boron doped layer in silicon |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4456489A (en) |
| EP (1) | EP0123680A1 (en) |
| CA (1) | CA1204370A (en) |
| WO (1) | WO1984001665A1 (en) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4584026A (en) * | 1984-07-25 | 1986-04-22 | Rca Corporation | Ion-implantation of phosphorus, arsenic or boron by pre-amorphizing with fluorine ions |
| US4617066A (en) * | 1984-11-26 | 1986-10-14 | Hughes Aircraft Company | Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing |
| JPH07101677B2 (en) * | 1985-12-02 | 1995-11-01 | 株式会社東芝 | Method for manufacturing semiconductor device |
| US4740478A (en) * | 1987-01-30 | 1988-04-26 | Motorola Inc. | Integrated circuit method using double implant doping |
| US4889819A (en) * | 1988-05-20 | 1989-12-26 | International Business Machines Corporation | Method for fabricating shallow junctions by preamorphizing with dopant of same conductivity as substrate |
| US5187737A (en) * | 1990-08-27 | 1993-02-16 | Origin Electric Company, Limited | Power supply device for X-ray tube |
| US6239441B1 (en) * | 1997-01-20 | 2001-05-29 | Kabushiki Kaisha Toshiba | Apparatus for manufacturing a semiconductor device and a method for manufacturing a semiconductor device |
| US6136673A (en) * | 1998-02-12 | 2000-10-24 | Lucent Technologies Inc. | Process utilizing selective TED effect when forming devices with shallow junctions |
| US6136672A (en) * | 1998-04-17 | 2000-10-24 | Lucent Technologies Inc. | Process for device fabrication using a high-energy boron implant |
| US6503817B1 (en) * | 1999-09-23 | 2003-01-07 | Advanced Micro Devices, Inc. | Method for establishing dopant profile to suppress silicidation retardation effect in CMOS process |
| KR20110042051A (en) | 2008-06-11 | 2011-04-22 | 솔라 임플란트 테크놀로지스 아이엔씨. | Solar cell fabrication using implantation |
| WO2010036621A2 (en) * | 2008-09-25 | 2010-04-01 | Applied Materials, Inc. | Defect-free junction formation using octadecaborane self-amorphizing implants |
| US8749053B2 (en) | 2009-06-23 | 2014-06-10 | Intevac, Inc. | Plasma grid implant system for use in solar cell fabrications |
| US20110070724A1 (en) | 2009-09-21 | 2011-03-24 | Applied Materials, Inc. | Defect-free junction formation using octadecaborane self-amorphizing implants |
| JP6068491B2 (en) | 2011-11-08 | 2017-01-25 | インテヴァック インコーポレイテッド | Substrate processing system and substrate processing method |
| US10655911B2 (en) | 2012-06-20 | 2020-05-19 | Battelle Energy Alliance, Llc | Natural gas liquefaction employing independent refrigerant path |
| WO2014100506A1 (en) | 2012-12-19 | 2014-06-26 | Intevac, Inc. | Grid for plasma ion implant |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1269359A (en) * | 1968-08-22 | 1972-04-06 | Atomic Energy Authority Uk | Improvements in or relating to semiconductors and methods of doping semiconductors |
| DE2627855A1 (en) * | 1976-06-22 | 1977-12-29 | Siemens Ag | SEMI-CONDUCTOR COMPONENT WITH AT LEAST TWO ZONES FORMING A PN-TRANSITION, DIFFERENT LINE TYPES AND PROCESS FOR THEIR PRODUCTION |
| US4133704A (en) * | 1977-01-17 | 1979-01-09 | General Motors Corporation | Method of forming diodes by amorphous implantations and concurrent annealing, monocrystalline reconversion and oxide passivation in <100> N-type silicon |
| US4133701A (en) * | 1977-06-29 | 1979-01-09 | General Motors Corporation | Selective enhancement of phosphorus diffusion by implanting halogen ions |
| JPS5459074A (en) * | 1977-10-20 | 1979-05-12 | Toshiba Corp | Semiconductor device |
| US4144100A (en) * | 1977-12-02 | 1979-03-13 | General Motors Corporation | Method of low dose phoshorus implantation for oxide passivated diodes in <10> P-type silicon |
| US4391651A (en) * | 1981-10-15 | 1983-07-05 | The United States Of America As Represented By The Secretary Of The Navy | Method of forming a hyperabrupt interface in a GaAs substrate |
-
1982
- 1982-10-15 US US06/434,677 patent/US4456489A/en not_active Expired - Lifetime
-
1983
- 1983-08-15 WO PCT/US1983/001257 patent/WO1984001665A1/en unknown
- 1983-08-15 EP EP83902740A patent/EP0123680A1/en not_active Withdrawn
- 1983-08-22 CA CA000435050A patent/CA1204370A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| US4456489A (en) | 1984-06-26 |
| EP0123680A1 (en) | 1984-11-07 |
| WO1984001665A1 (en) | 1984-04-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA1204370A (en) | Method of forming a shallow and high conductivity boron doped layer in silicon | |
| US6632728B2 (en) | Increasing the electrical activation of ion-implanted dopants | |
| EP0146233B1 (en) | Low temperature process for annealing shallow implanted n+/p junctions | |
| US5429972A (en) | Method of fabricating a capacitor with a textured polysilicon interface and an enhanced dielectric | |
| US6069062A (en) | Methods for forming shallow junctions in semiconductor wafers | |
| JPH0777259B2 (en) | Method for manufacturing polycrystalline silicon resistor having desired temperature coefficient | |
| US4764478A (en) | Method of manufacturing MOS transistor by dual species implantation and rapid annealing | |
| EP0097533B1 (en) | A method of manufacturing a mis type semiconductor device | |
| EP0508679B1 (en) | Method for making a silicide layer by ionic implantation | |
| US20020187614A1 (en) | Methods for forming ultrashallow junctions with low sheet resistance | |
| US7105427B1 (en) | Method for shallow dopant distribution | |
| GB2316224A (en) | A method of implanting ions in semiconductors | |
| JPH0642465B2 (en) | Method of forming shallow junction | |
| US6555484B1 (en) | Method for controlling the oxidation of implanted silicon | |
| US4472210A (en) | Method of making a semiconductor device to improve conductivity of amorphous silicon films | |
| US6767809B2 (en) | Method of forming ultra shallow junctions | |
| WO2005045918A1 (en) | Silicide formation for a semiconductor device | |
| JPH0334649B2 (en) | ||
| KR100212010B1 (en) | Method for fabricating transistor of semiconductor device | |
| WO2001080295A1 (en) | Methods for forming ultrashallow junctions in semiconductor wafers using nitrogen implantation | |
| EP4123686A1 (en) | Method for controlling donor concentration in silicon single crystal substrate | |
| JP2685384B2 (en) | Semiconductor substrate manufacturing method | |
| JPS63124520A (en) | Manufacture of semiconductor device | |
| JPH03265131A (en) | Manufacture of semiconductor device | |
| JPH01232718A (en) | Manufacture of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |