CA1090923A - Memoire pour ensemble de traitement de donnees numeriques - Google Patents

Memoire pour ensemble de traitement de donnees numeriques

Info

Publication number
CA1090923A
CA1090923A CA343,445A CA343445A CA1090923A CA 1090923 A CA1090923 A CA 1090923A CA 343445 A CA343445 A CA 343445A CA 1090923 A CA1090923 A CA 1090923A
Authority
CA
Canada
Prior art keywords
memory
signal
address
signals
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA343,445A
Other languages
English (en)
Inventor
Stephen R. Jenkins
Thomas A. Northrup
Robert E. Stewart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/658,113 external-priority patent/US4055851A/en
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Priority to CA343,445A priority Critical patent/CA1090923A/fr
Application granted granted Critical
Publication of CA1090923A publication Critical patent/CA1090923A/fr
Expired legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
CA343,445A 1976-02-13 1980-01-10 Memoire pour ensemble de traitement de donnees numeriques Expired CA1090923A (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA343,445A CA1090923A (fr) 1976-02-13 1980-01-10 Memoire pour ensemble de traitement de donnees numeriques

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US658,113 1976-02-13
US05/658,113 US4055851A (en) 1976-02-13 1976-02-13 Memory module with means for generating a control signal that inhibits a subsequent overlapped memory cycle during a reading operation portion of a reading memory cycle
CA271,545A CA1083724A (fr) 1976-02-13 1977-02-11 Memoire pour systeme de traitement de l'information digitale
CA343,445A CA1090923A (fr) 1976-02-13 1980-01-10 Memoire pour ensemble de traitement de donnees numeriques

Publications (1)

Publication Number Publication Date
CA1090923A true CA1090923A (fr) 1980-12-02

Family

ID=27164905

Family Applications (1)

Application Number Title Priority Date Filing Date
CA343,445A Expired CA1090923A (fr) 1976-02-13 1980-01-10 Memoire pour ensemble de traitement de donnees numeriques

Country Status (1)

Country Link
CA (1) CA1090923A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112506815A (zh) * 2020-11-27 2021-03-16 海光信息技术股份有限公司 数据传输方法和数据传输装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112506815A (zh) * 2020-11-27 2021-03-16 海光信息技术股份有限公司 数据传输方法和数据传输装置

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