CA1089569A - Multiplicateur binaire a circuit de codage - Google Patents

Multiplicateur binaire a circuit de codage

Info

Publication number
CA1089569A
CA1089569A CA301,370A CA301370A CA1089569A CA 1089569 A CA1089569 A CA 1089569A CA 301370 A CA301370 A CA 301370A CA 1089569 A CA1089569 A CA 1089569A
Authority
CA
Canada
Prior art keywords
bit
register
bits
binary
product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA301,370A
Other languages
English (en)
Inventor
Ernst A. Munter
Carmine A. Ciancibello
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Priority to CA301,370A priority Critical patent/CA1089569A/fr
Priority to GB7911981A priority patent/GB2020068B/en
Priority to JP54045522A priority patent/JPS583252B2/ja
Priority to SE7903354A priority patent/SE440562B/sv
Priority to FR7909666A priority patent/FR2423821A1/fr
Application granted granted Critical
Publication of CA1089569A publication Critical patent/CA1089569A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/49—Computations with a radix, other than binary, 8, 16 or decimal, e.g. ternary, negative or imaginary radices, mixed radix non-linear PCM
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/50—Conversion to or from non-linear codes, e.g. companding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Nonlinear Science (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Image Processing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Error Detection And Correction (AREA)
  • Complex Calculations (AREA)
CA301,370A 1978-04-18 1978-04-18 Multiplicateur binaire a circuit de codage Expired CA1089569A (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CA301,370A CA1089569A (fr) 1978-04-18 1978-04-18 Multiplicateur binaire a circuit de codage
GB7911981A GB2020068B (en) 1978-04-18 1979-04-05 Binary multiplier circuit including coding circuit
JP54045522A JPS583252B2 (ja) 1978-04-18 1979-04-16 符号化回路を含む２進乗算回路
SE7903354A SE440562B (sv) 1978-04-18 1979-04-17 Multiplikatorkrets for multiplicering av ett forsta binert tal utan fortecken med ett andra binert tal utan fortecken och alstring av en kodad biner produkt utan fortecken
FR7909666A FR2423821A1 (fr) 1978-04-18 1979-04-17 Circuit multiplicateur binaire comprenant un circuit de codage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA301,370A CA1089569A (fr) 1978-04-18 1978-04-18 Multiplicateur binaire a circuit de codage

Publications (1)

Publication Number Publication Date
CA1089569A true CA1089569A (fr) 1980-11-11

Family

ID=4111272

Family Applications (1)

Application Number Title Priority Date Filing Date
CA301,370A Expired CA1089569A (fr) 1978-04-18 1978-04-18 Multiplicateur binaire a circuit de codage

Country Status (5)

Country Link
JP (1) JPS583252B2 (fr)
CA (1) CA1089569A (fr)
FR (1) FR2423821A1 (fr)
GB (1) GB2020068B (fr)
SE (1) SE440562B (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0452064U (fr) * 1990-09-10 1992-05-01

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1086043A (fr) * 1953-07-02 1955-02-09 Electronique & Automatisme Sa Perfectionnements aux multiplieurs pour calculatrices électriques numériques
FR2276635A1 (fr) * 1974-06-28 1976-01-23 Jeumont Schneider Multiplieur numerique rapide et ses applications
GB1597468A (en) * 1977-06-02 1981-09-09 Post Office Conversion between linear pcm representation and compressed pcm

Also Published As

Publication number Publication date
SE440562B (sv) 1985-08-05
FR2423821B1 (fr) 1984-11-02
SE7903354L (sv) 1979-10-19
JPS583252B2 (ja) 1983-01-20
JPS54140434A (en) 1979-10-31
FR2423821A1 (fr) 1979-11-16
GB2020068B (en) 1982-09-02
GB2020068A (en) 1979-11-07

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Legal Events

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