CA1049156A - Method for forming recessed regions of thermally oxidized silicon and structures thereof - Google Patents

Method for forming recessed regions of thermally oxidized silicon and structures thereof

Info

Publication number
CA1049156A
CA1049156A CA76266526A CA266526A CA1049156A CA 1049156 A CA1049156 A CA 1049156A CA 76266526 A CA76266526 A CA 76266526A CA 266526 A CA266526 A CA 266526A CA 1049156 A CA1049156 A CA 1049156A
Authority
CA
Canada
Prior art keywords
major surface
silicon
layer
forming
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA76266526A
Other languages
English (en)
French (fr)
Inventor
Donald P. Cameron
Paul J. Tsang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1049156A publication Critical patent/CA1049156A/en
Expired legal-status Critical Current

Links

Classifications

    • H10W10/012—
    • H10P14/61—
    • H10P50/644—
    • H10W10/13—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/973—Substrate orientation

Landscapes

  • Element Separation (AREA)
CA76266526A 1975-11-24 1976-11-24 Method for forming recessed regions of thermally oxidized silicon and structures thereof Expired CA1049156A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/634,571 US3998674A (en) 1975-11-24 1975-11-24 Method for forming recessed regions of thermally oxidized silicon and structures thereof utilizing anisotropic etching

Publications (1)

Publication Number Publication Date
CA1049156A true CA1049156A (en) 1979-02-20

Family

ID=24544344

Family Applications (1)

Application Number Title Priority Date Filing Date
CA76266526A Expired CA1049156A (en) 1975-11-24 1976-11-24 Method for forming recessed regions of thermally oxidized silicon and structures thereof

Country Status (8)

Country Link
US (1) US3998674A (OSRAM)
JP (1) JPS5264884A (OSRAM)
CA (1) CA1049156A (OSRAM)
DE (1) DE2651423A1 (OSRAM)
FR (1) FR2332618A1 (OSRAM)
GB (1) GB1497199A (OSRAM)
IT (1) IT1077022B (OSRAM)
NL (1) NL7611523A (OSRAM)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4096619A (en) * 1977-01-31 1978-06-27 International Telephone & Telegraph Corporation Semiconductor scribing method
US4278987A (en) * 1977-10-17 1981-07-14 Hitachi, Ltd. Junction isolated IC with thick EPI portion having sides at least 20 degrees from (110) orientations
FR2408914A1 (fr) * 1977-11-14 1979-06-08 Radiotechnique Compelec Dispositif semi-conducteur monolithique comprenant deux transistors complementaires et son procede de fabrication
US4118250A (en) * 1977-12-30 1978-10-03 International Business Machines Corporation Process for producing integrated circuit devices by ion implantation
JPS60253268A (ja) * 1984-05-29 1985-12-13 Meidensha Electric Mfg Co Ltd 半導体装置
JPS6156446A (ja) * 1984-08-28 1986-03-22 Toshiba Corp 半導体装置およびその製造方法
JP3031117B2 (ja) * 1993-06-02 2000-04-10 日産自動車株式会社 半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3728166A (en) * 1967-01-11 1973-04-17 Ibm Semiconductor device fabrication method and product thereby
JPS507909B1 (OSRAM) * 1969-08-04 1975-03-31
JPS4844830B1 (OSRAM) * 1969-08-21 1973-12-27 Tokyo Shibaura Electric Co
DE2120388A1 (de) * 1970-04-28 1971-12-16 Agency Ind Science Techn Verbindungshalbleitervorrichtung
US3765969A (en) * 1970-07-13 1973-10-16 Bell Telephone Labor Inc Precision etching of semiconductors
US3810796A (en) * 1972-08-31 1974-05-14 Texas Instruments Inc Method of forming dielectrically isolated silicon diode array vidicon target
US3883948A (en) * 1974-01-02 1975-05-20 Signetics Corp Semiconductor structure and method

Also Published As

Publication number Publication date
NL7611523A (nl) 1977-04-26
FR2332618A1 (fr) 1977-06-17
FR2332618B1 (OSRAM) 1978-06-30
DE2651423A1 (de) 1977-05-26
JPS5264884A (en) 1977-05-28
US3998674A (en) 1976-12-21
IT1077022B (it) 1985-04-27
GB1497199A (en) 1978-01-05
JPS5419755B2 (OSRAM) 1979-07-17

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