BR9916067A - Implementação eficiente de intercaladores de turbo código propostos para acesso múltiplo por divisão de código de terceira geração - Google Patents

Implementação eficiente de intercaladores de turbo código propostos para acesso múltiplo por divisão de código de terceira geração

Info

Publication number
BR9916067A
BR9916067A BR9916067-6A BR9916067A BR9916067A BR 9916067 A BR9916067 A BR 9916067A BR 9916067 A BR9916067 A BR 9916067A BR 9916067 A BR9916067 A BR 9916067A
Authority
BR
Brazil
Prior art keywords
multiple access
memory
code division
efficient implementation
counter
Prior art date
Application number
BR9916067-6A
Other languages
English (en)
Other versions
BR9916067B1 (pt
Inventor
Jian Cui
Bin Li
Wen Tong
Rui R Wang
Original Assignee
Nortel Networks Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nortel Networks Corp filed Critical Nortel Networks Corp
Publication of BR9916067A publication Critical patent/BR9916067A/pt
Publication of BR9916067B1 publication Critical patent/BR9916067B1/pt

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2735Interleaver using powers of a primitive element, e.g. Galois field [GF] interleaver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2771Internal interleaver for turbo codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J13/00Code division multiplex systems
    • H04J13/0007Code type
    • H04J13/0022PN, e.g. Kronecker

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

"IMPLEMENTAçãO EFICIENTE DE INTERCALADORES DE TURBO CóDIGO PROPOSTOS PARA ACESSO MúLTIPLO POR DIVISãO DE CóDIGO DE TERCEIRA GERAçãO". A invenção refere-se a métodos e aparelho para intercaladores de Turbo Código para uso com dados de acesso múltiplo por divisão de código de terceira geração (3G CDMA). O aparelho inclui uma memória para receber e temporariamente armazenar os dados, um contador e um relógio acoplado na memória e contador para sincronização. O aparelho também inclui uma tabela contendo endereços que são selecionados pelo contador. Um dispositivo de invalidação acoplado na tabela descarta os endereços se eles são maiores do que um tamanho de quadro. Uma memória intermediária é acoplada na memória e no relógio. A memória é configurada para recuperar dados dos endereços selecionados que não são descartados e enviá-los para a memória intermediária para saída.
BRPI9916067-6A 1998-12-10 1999-12-06 Intercalador de turbo código, e método e aparelho de intercalação BR9916067B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11174798P 1998-12-10 1998-12-10
US60/111,747 1998-12-10
PCT/IB1999/001937 WO2000035101A1 (en) 1998-12-10 1999-12-06 Efficient implementation of proposed turbo code interleavers for third generation code division multiple access

Publications (2)

Publication Number Publication Date
BR9916067A true BR9916067A (pt) 2002-01-29
BR9916067B1 BR9916067B1 (pt) 2014-08-05

Family

ID=22340234

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI9916067-6A BR9916067B1 (pt) 1998-12-10 1999-12-06 Intercalador de turbo código, e método e aparelho de intercalação

Country Status (10)

Country Link
US (1) US6625234B1 (pt)
EP (1) EP1138121B1 (pt)
JP (1) JP4383672B2 (pt)
CN (1) CN1381095B (pt)
BR (1) BR9916067B1 (pt)
CA (1) CA2357613C (pt)
DE (1) DE69909649T2 (pt)
HK (1) HK1038653A1 (pt)
MX (1) MXPA01005902A (pt)
WO (1) WO2000035101A1 (pt)

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US8179954B2 (en) 2007-10-30 2012-05-15 Sony Corporation Odd interleaving only of an odd-even interleaver when half or less data subcarriers are active in a digital video broadcasting (DVB) standard
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US20110047434A1 (en) * 2008-04-28 2011-02-24 Qualcomm Incorporated Wireless communication of turbo coded atsc m/h data with time diversity
US8982832B2 (en) * 2008-04-28 2015-03-17 Qualcomm Incorporated Wireless communication of turbo coded data with time diversity
GB2460459B (en) * 2008-05-30 2012-07-11 Sony Corp Data processing apparatus and method
US8612820B2 (en) * 2009-04-11 2013-12-17 Qualcomm Incorporated Apparatus and methods for interleaving in a forward link only system
US8237869B2 (en) 2010-03-31 2012-08-07 Silicon Laboratories Inc. Multi-standard digital demodulator for TV signals broadcast over cable, satellite and terrestrial networks
US8555131B2 (en) 2010-03-31 2013-10-08 Silicon Laboratories Inc. Techniques to control power consumption in an iterative decoder by control of node configurations
US8433970B2 (en) 2010-03-31 2013-04-30 Silicon Laboratories Inc. Techniques to control power consumption in an iterative decoder by control of node configurations
US8341486B2 (en) 2010-03-31 2012-12-25 Silicon Laboratories Inc. Reducing power consumption in an iterative decoder
US8837611B2 (en) 2011-02-09 2014-09-16 Silicon Laboratories Inc. Memory-aided synchronization in a receiver
US8644370B2 (en) 2012-01-25 2014-02-04 Silicon Laboratories Providing slope values for a demapper
EP2693673A1 (en) * 2012-08-01 2014-02-05 Alcatel Lucent Bit-interleaver for an optical line terminal
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KR102453472B1 (ko) 2015-02-27 2022-10-14 한국전자통신연구원 가변 길이 시그널링 정보 부호화를 위한 패리티 펑처링 장치 및 이를 이용한 패리티 펑처링 방법
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CN109688117B (zh) * 2018-12-11 2021-10-15 国家电网公司信息通信分公司 一种大容量ip地址拦截方法和设备

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Also Published As

Publication number Publication date
MXPA01005902A (es) 2002-08-30
CA2357613A1 (en) 2000-06-15
EP1138121B1 (en) 2003-07-16
CN1381095A (zh) 2002-11-20
HK1038653A1 (en) 2002-03-22
US6625234B1 (en) 2003-09-23
DE69909649T2 (de) 2004-03-04
DE69909649D1 (de) 2003-08-21
JP2002532939A (ja) 2002-10-02
CN1381095B (zh) 2010-06-02
WO2000035101A1 (en) 2000-06-15
EP1138121A1 (en) 2001-10-04
CA2357613C (en) 2008-02-05
BR9916067B1 (pt) 2014-08-05
JP4383672B2 (ja) 2009-12-16

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Legal Events

Date Code Title Description
B06A Patent application procedure suspended [chapter 6.1 patent gazette]
B07A Application suspended after technical examination (opinion) [chapter 7.1 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 05/08/2014, OBSERVADAS AS CONDICOES LEGAIS.

B25A Requested transfer of rights approved
B25A Requested transfer of rights approved
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