BR9913632A - Controlador de rede - Google Patents

Controlador de rede

Info

Publication number
BR9913632A
BR9913632A BR9913632-5A BR9913632A BR9913632A BR 9913632 A BR9913632 A BR 9913632A BR 9913632 A BR9913632 A BR 9913632A BR 9913632 A BR9913632 A BR 9913632A
Authority
BR
Brazil
Prior art keywords
mac
network controller
bus interface
network
layer
Prior art date
Application number
BR9913632-5A
Other languages
English (en)
Inventor
Steven D Williams
Amir David-Assaf Zinaty
Carey W Smith
Gideon Prat
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of BR9913632A publication Critical patent/BR9913632A/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/407—Bus networks with decentralised control
    • H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H04L12/40013—Details regarding a bus controller

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)

Abstract

Patente de Invenção: <B>"CONTROLADOR DE REDE"<D>. Um controlador de rede (100) compreendendo uma camada de controlador de acesso de mídia (MAC), uma camada de protocolo físico (PHY) (110), uma interface de barramento de PCI (200), e uma interface de barramento auxiliar (180). As interfaces de barramento de PCI e auxiliar são acopladas na rede de modo a transmitir e receber de um enlace de rede sinais digitais binários via as camadas de MAC e de PHY. A camada de MAC é adaptada de modo a processar e direcionar pelo menos porções dos sinais digitais para uma interface de barramento auxiliar.
BR9913632-5A 1998-08-19 1999-05-25 Controlador de rede BR9913632A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/136,870 US6385211B1 (en) 1998-08-19 1998-08-19 Network controller
PCT/US1999/011541 WO2000011839A1 (en) 1998-08-19 1999-05-25 Network controller

Publications (1)

Publication Number Publication Date
BR9913632A true BR9913632A (pt) 2001-05-22

Family

ID=22474757

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9913632-5A BR9913632A (pt) 1998-08-19 1999-05-25 Controlador de rede

Country Status (9)

Country Link
US (1) US6385211B1 (pt)
EP (1) EP1101328B1 (pt)
CN (1) CN1160908C (pt)
AU (1) AU4098299A (pt)
BR (1) BR9913632A (pt)
DE (1) DE69915635T2 (pt)
HK (1) HK1034621A1 (pt)
TW (1) TW437210B (pt)
WO (1) WO2000011839A1 (pt)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7328270B1 (en) * 1999-02-25 2008-02-05 Advanced Micro Devices, Inc. Communication protocol processor having multiple microprocessor cores connected in series and dynamically reprogrammed during operation via instructions transmitted along the same data paths used to convey communication data
US6629059B2 (en) * 2001-05-14 2003-09-30 Fisher-Rosemount Systems, Inc. Hand held diagnostic and communication device with automatic bus detection
US7181544B2 (en) * 2002-09-03 2007-02-20 Intel Corporation Network protocol engine
US7016354B2 (en) * 2002-09-03 2006-03-21 Intel Corporation Packet-based clock signal
US20040044796A1 (en) * 2002-09-03 2004-03-04 Vangal Sriram R. Tracking out-of-order packets
US20040073716A1 (en) * 2002-10-14 2004-04-15 Boom Douglas D. System, device and method for media data offload processing
US20050041685A1 (en) * 2002-10-29 2005-02-24 Oleg Logvinov Highly programmable MAC architecture for handling protocols that require precision timing and demand very short response times
US7543048B2 (en) * 2002-11-22 2009-06-02 Intel Corporation Methods and apparatus for enabling of a remote management agent independent of an operating system
US7324540B2 (en) 2002-12-31 2008-01-29 Intel Corporation Network protocol off-load engines
US8856401B2 (en) * 2003-11-25 2014-10-07 Lsi Corporation Universal controller for peripheral devices in a computing system
US7707586B2 (en) * 2004-09-08 2010-04-27 Intel Corporation Operating system independent agent
US20060233174A1 (en) * 2005-03-28 2006-10-19 Rothman Michael A Method and apparatus for distributing switch/router capability across heterogeneous compute groups
US7542467B2 (en) * 2005-03-28 2009-06-02 Intel Corporation Out-of-band platform switch
US20070076747A1 (en) * 2005-09-30 2007-04-05 Amir Zinaty Periodic network controller power-down
CN100463450C (zh) * 2005-10-13 2009-02-18 中兴通讯股份有限公司 一种实现PCI总线与G.Link总线之间相互转换的系统及方法
KR101725536B1 (ko) * 2013-04-17 2017-04-11 인텔 코포레이션 Pcie 프로토콜 스택을 이용하는 저전력 phy의 동작을 위한 디바이스, 방법 및 시스템
US11178176B2 (en) * 2019-03-27 2021-11-16 Board Of Trustees Of The University Of Arkansas Methods and systems for detection of man-in-the-middle attacks for SCADA communication networks and applications of same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3320143B2 (ja) * 1993-05-19 2002-09-03 富士通株式会社 Ｌａｎ自動電源制御装置とそのリモートパワーオン制御方法
US5784573A (en) * 1994-11-04 1998-07-21 Texas Instruments Incorporated Multi-protocol local area network controller
US5758177A (en) * 1995-09-11 1998-05-26 Advanced Microsystems, Inc. Computer system having separate digital and analog system chips for improved performance
US5878028A (en) * 1996-06-06 1999-03-02 Advanced Micro Devices, Inc. Data structure to support multiple transmit packets for high performance
US5764896A (en) * 1996-06-28 1998-06-09 Compaq Computer Corporation Method and system for reducing transfer latency when transferring data from a network to a computer system
US5905870A (en) * 1996-09-11 1999-05-18 Advanced Micro Devices, Inc Arrangement for initiating and maintaining flow control in shared-medium, full-duplex, and switched networks
US5838688A (en) * 1996-10-11 1998-11-17 Advanced Micro Devices, Inc. Determining the number of active nudes on an ethernet network by counting a number of packet receptions

Also Published As

Publication number Publication date
EP1101328A1 (en) 2001-05-23
CN1160908C (zh) 2004-08-04
WO2000011839A1 (en) 2000-03-02
TW437210B (en) 2001-05-28
EP1101328B1 (en) 2004-03-17
EP1101328A4 (en) 2002-03-13
AU4098299A (en) 2000-03-14
CN1323480A (zh) 2001-11-21
DE69915635T2 (de) 2004-08-05
HK1034621A1 (en) 2001-10-26
US6385211B1 (en) 2002-05-07
DE69915635D1 (de) 2004-04-22

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Legal Events

Date Code Title Description
B08F Application fees: application dismissed [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A, 6A, 7A E 8A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 1913 DE 04/09/2007.

B15K Others concerning applications: alteration of classification

Ipc: H04L 12/413 (2006.01), H04L 12/40 (2006.0