BR9911732A - Protocolo aperfeiçoado para barramento serial entre dispositivos - Google Patents

Protocolo aperfeiçoado para barramento serial entre dispositivos

Info

Publication number
BR9911732A
BR9911732A BR9911732-0A BR9911732A BR9911732A BR 9911732 A BR9911732 A BR 9911732A BR 9911732 A BR9911732 A BR 9911732A BR 9911732 A BR9911732 A BR 9911732A
Authority
BR
Brazil
Prior art keywords
serial bus
data
wire
clock
signal level
Prior art date
Application number
BR9911732-0A
Other languages
English (en)
Inventor
Sanjay K Jha
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR9911732A publication Critical patent/BR9911732A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

Patente de Invenção: "PROTOCOLO APERFEIçOADO PARA BARRAMENTO SERIAL ENTRE DISPOSITIVOS". Um protocolo para barramento serial entre dispositivos facilita a interconexão e comunicação entre vários dispositivos através de um barramento serial. O barramento (48) compreende um fio de clock, um fio de dados e um fio de início / parada. Uma interface mestre de barramento serial acopla um dispositivo mestre ao barramento serial. Uma interface escrava de barramento serial acopla um dispositivo escravo ao barramento serial. A interface mestre de barramento serial (180) pode compreender um iniciador de transação, um mecanismo de gravação de dados, um mecanismo de leitura de dados e um excitador de clock. O iniciador de transação inicia uma transação puxando o nível de sinal do fio de partida / parada para baixo. O mecanismo de gravação de dados controla o nível de sinal no fio de dados de acordo com os dados a serem gravados no dispositivo escravo. O mecanismo de leitura de dados lê os dados através da monitoração do nível de sinal no fio de dados. O excitador de clock controla o nível de sinal no fio de clock de acordo com um sinal de clock desejado.
BR9911732-0A 1998-07-01 1999-06-30 Protocolo aperfeiçoado para barramento serial entre dispositivos BR9911732A (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US9138398P 1998-07-01 1998-07-01
US24893999A 1999-02-11 1999-02-11
PCT/US1999/014696 WO2000002134A2 (en) 1998-07-01 1999-06-30 Improved inter-device serial bus protocol

Publications (1)

Publication Number Publication Date
BR9911732A true BR9911732A (pt) 2002-01-29

Family

ID=26783906

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9911732-0A BR9911732A (pt) 1998-07-01 1999-06-30 Protocolo aperfeiçoado para barramento serial entre dispositivos

Country Status (9)

Country Link
EP (1) EP1145132A3 (pt)
JP (1) JP2003534580A (pt)
KR (1) KR20010053365A (pt)
AU (1) AU4843299A (pt)
BR (1) BR9911732A (pt)
CA (1) CA2336385A1 (pt)
IL (1) IL140568A0 (pt)
NO (1) NO20006698L (pt)
WO (1) WO2000002134A2 (pt)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7076225B2 (en) * 2001-02-16 2006-07-11 Qualcomm Incorporated Variable gain selection in direct conversion receiver
FR2828947B1 (fr) * 2001-08-27 2003-12-19 Pierre Trazic Fonctions out et in de connection sur un bus uce
JP4831899B2 (ja) * 2001-08-28 2011-12-07 富士通セミコンダクター株式会社 半導体集積回路及びクロック制御方法
WO2003060737A1 (en) * 2001-12-28 2003-07-24 Koninklijke Philips Electronics N.V. Communication system
DE102005007333B4 (de) * 2004-05-07 2008-07-03 Avago Technologies General Ip (Singapore) Pte. Ltd. Mehrchip-Gehäuse mit seriellen Hochgeschwindigkeitskommunikationen zwischen Halbleiterformen
US7342310B2 (en) 2004-05-07 2008-03-11 Avago Technologies General Ip Pte Ltd Multi-chip package with high-speed serial communications between semiconductor die
US20060031618A1 (en) * 2004-05-20 2006-02-09 Hansquine David W Single wire and three wire bus interoperability
US20050259609A1 (en) 2004-05-20 2005-11-24 Hansquine David W Single wire bus interface
KR100698303B1 (ko) * 2005-03-21 2007-03-22 엘지전자 주식회사 직렬 버스 디렉션 컨트롤러
KR100910446B1 (ko) 2007-12-03 2009-08-04 주식회사 동부하이텍 디스플레이 장치용 ｉ２ｃ 타임 콘트롤러의 데이터 동기화구현 회로 및 방법
WO2011056729A2 (en) * 2009-11-05 2011-05-12 Rambus Inc. Interface clock management
US9300129B2 (en) 2013-03-12 2016-03-29 Ascensia Diabetes Care Holding Ag Reverse battery protection for battery-powered devices
CN106462526B (zh) * 2014-02-07 2019-12-31 安晟信医疗科技控股公司 用于多主总线协议的方法及装置
US10417172B2 (en) 2014-04-28 2019-09-17 Qualcomm Incorporated Sensors global bus
US9734121B2 (en) 2014-04-28 2017-08-15 Qualcomm Incorporated Sensors global bus
IT201800002767A1 (it) 2018-02-16 2019-08-16 St Microelectronics Srl Circuito per il pilotaggio di led, dispositivo e procedimento corrispondenti

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4910509A (en) * 1988-03-17 1990-03-20 Zenith Electronics Corporation Bus expander for digital TV receiver
EP0589499B1 (en) * 1992-08-12 1999-04-07 Koninklijke Philips Electronics N.V. A multistation communication bus system, and a master station and a slave station for use in such system
GB2278259B (en) * 1993-05-21 1997-01-15 Northern Telecom Ltd Serial bus system

Also Published As

Publication number Publication date
KR20010053365A (ko) 2001-06-25
CA2336385A1 (en) 2000-01-13
WO2000002134A2 (en) 2000-01-13
NO20006698L (no) 2001-02-20
EP1145132A3 (en) 2002-08-21
NO20006698D0 (no) 2000-12-29
IL140568A0 (en) 2002-02-10
EP1145132A2 (en) 2001-10-17
JP2003534580A (ja) 2003-11-18
AU4843299A (en) 2000-01-24
WO2000002134A3 (en) 2001-09-27

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Legal Events

Date Code Title Description
FA10 Dismissal: dismissal - article 33 of industrial property law
B11Y Definitive dismissal - extension of time limit for request of examination expired [chapter 11.1.1 patent gazette]