BR9811368A - Circuito fechado bloqueado em fase, filtro de circuito fechado que filtra um sinal de erro do mesmo, e, processos para controlar o circuito e o filtro - Google Patents

Circuito fechado bloqueado em fase, filtro de circuito fechado que filtra um sinal de erro do mesmo, e, processos para controlar o circuito e o filtro

Info

Publication number
BR9811368A
BR9811368A BR9811368-2A BR9811368A BR9811368A BR 9811368 A BR9811368 A BR 9811368A BR 9811368 A BR9811368 A BR 9811368A BR 9811368 A BR9811368 A BR 9811368A
Authority
BR
Brazil
Prior art keywords
filter
closed circuit
error signal
phase
charge pump
Prior art date
Application number
BR9811368-2A
Other languages
English (en)
Inventor
W Scott Gaines
Original Assignee
Ericsson Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Inc filed Critical Ericsson Inc
Publication of BR9811368A publication Critical patent/BR9811368A/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

''CIRCUITO FECHADO BLOQUEADO EM FASE, FILTRO DE CIRCUITO FECHADO QUE FILTRA UM SINAL DE ERRO DO MESMO, E, PROCESSOS PARA CONTROLAR O CIRCUITO E O FILTRO'' Sistemas e processos de direcionar bomba de carga forcam uma bomba de carga de um filtro de circuito fechado de um circuito fechado bloqueado em fase a carregar ou descarregar um capacitor por um tempo predeterminado que é independente do sinal de erro do detetor de fase. Em seguida, a bomba de carga é ativada em resposta a um sinal de erro de detetor de fase. Concordantemente, em vez de confiar no sinal de erro para ativar uma bomba de carga, a bomba de carga pode ser ativada por um período de tempo que ajudará a adicionar ou remover uma quantidade necessária de carga para, ou, do filtro de circuito fechado. Tempos de bloqueio diminuídos podem desse modo, ser produzidos enquanto permitindo uma redução do tamanho e custo da bomba de carga. A invenção é, de preferência, aplicada a uma bomba de carga integral em um circuito fechado bloqueado em fase.
BR9811368-2A 1997-08-28 1998-08-26 Circuito fechado bloqueado em fase, filtro de circuito fechado que filtra um sinal de erro do mesmo, e, processos para controlar o circuito e o filtro BR9811368A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/919,711 US6028905A (en) 1997-08-28 1997-08-28 Charge pump steering systems and methods for loop filters of phase locked loops
PCT/US1998/017652 WO1999010983A1 (en) 1997-08-28 1998-08-26 Charge pump steering systems and methods for loop filters of phase locked loops

Publications (1)

Publication Number Publication Date
BR9811368A true BR9811368A (pt) 2000-08-22

Family

ID=25442517

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9811368-2A BR9811368A (pt) 1997-08-28 1998-08-26 Circuito fechado bloqueado em fase, filtro de circuito fechado que filtra um sinal de erro do mesmo, e, processos para controlar o circuito e o filtro

Country Status (12)

Country Link
US (1) US6028905A (pt)
EP (1) EP1012982A1 (pt)
JP (1) JP2002519904A (pt)
KR (1) KR20010052061A (pt)
CN (1) CN1269068A (pt)
AR (1) AR013453A1 (pt)
AU (1) AU738794B2 (pt)
BR (1) BR9811368A (pt)
CO (1) CO4790200A1 (pt)
EE (1) EE200000090A (pt)
MY (1) MY120759A (pt)
WO (1) WO1999010983A1 (pt)

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GB2357381B (en) * 1999-12-13 2003-12-24 Sony Uk Ltd Changing the output frequency of a phased-locked loop
DE10048590B4 (de) * 2000-09-30 2008-02-28 Infineon Technologies Ag Phasenregelkreis
US6693494B2 (en) * 2001-08-20 2004-02-17 Koninklijke Philips Electronics N.V. Frequency synthesizer with three mode loop filter charging
GB0126632D0 (en) * 2001-11-06 2002-01-02 Hitachi Ltd A communication semiconductor integrated circuit device and a wireless communication system
CN101465647B (zh) * 2007-12-21 2010-12-01 锐迪科微电子（上海）有限公司 锁相环装置中的滤波器及锁相环装置
CN101841330B (zh) * 2009-03-20 2012-09-05 南亚科技股份有限公司 相位检测模块以及相关的相位检测方法
CN102055468B (zh) * 2009-11-06 2012-11-28 立积电子股份有限公司 锁相回路及其控制方法
CN101714874B (zh) * 2009-11-11 2012-03-28 钰创科技股份有限公司 具省电功能的延迟锁相回路
US8085099B2 (en) * 2010-04-06 2011-12-27 Sandisk Technologies Inc. Self-calibrating relaxation oscillator based clock source
CN105099444B (zh) * 2014-04-29 2018-05-25 龙芯中科技术有限公司 环路滤波方法、环路滤波器及锁相环
US9979408B2 (en) 2016-05-05 2018-05-22 Analog Devices, Inc. Apparatus and methods for phase synchronization of phase-locked loops
CN107017878B (zh) * 2017-05-23 2020-07-21 中国人民解放军国防科学技术大学 一种锁相环中抗单粒子瞬态的电荷泵输出电路
US11082051B2 (en) * 2018-05-11 2021-08-03 Analog Devices Global Unlimited Company Apparatus and methods for timing offset compensation in frequency synthesizers
JP7350512B2 (ja) * 2019-05-17 2023-09-26 ローム株式会社 発振回路、半導体装置、オシレータｉｃ、発振回路の校正方法

Family Cites Families (13)

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Publication number Priority date Publication date Assignee Title
US4562410A (en) * 1983-12-29 1985-12-31 Rca Corporation Phase lock loop prepositioning apparatus with feedback control
US4562411A (en) * 1983-12-29 1985-12-31 Rca Corporation Prepositioning circuit for phase lock loop
DE69107891T2 (de) * 1990-05-21 1995-11-02 Nippon Electric Co Phasenregelschleifenschaltung.
JPH04227332A (ja) * 1990-05-21 1992-08-17 Nec Corp Ｐｌｌ回路
US5384551A (en) * 1993-02-25 1995-01-24 Delco Electronics Corporation Fast locking phase locked loop frequency synthesizer
US5614870A (en) * 1993-04-20 1997-03-25 Rca Thomson Licensing Corporation Phase lock loop with idle mode of operation during vertical blanking
US5371425A (en) * 1993-09-10 1994-12-06 Sun Microsystems, Inc. Digital damping method and apparatus for phase-locked loops
JPH07170178A (ja) * 1993-09-10 1995-07-04 Sun Microsyst Inc Ｐｌｌ減衰回路
US5546053A (en) * 1994-07-27 1996-08-13 Texas Instruments Incorporated Phase locked loop having booster circuit for rapid lockup
US5483558A (en) * 1994-08-08 1996-01-09 Motorola Inc. Method and apparatus for detecting phase or frequency lock
KR0174497B1 (ko) * 1995-10-06 1999-04-01 김광호 고속 cmos 전하펌프의 전류 스위칭회로
JP3338748B2 (ja) * 1996-01-30 2002-10-28 日本電気株式会社 Ｐｌｌ周波数シンセサイザ
US5734301A (en) * 1996-08-15 1998-03-31 Realtek Semiconductor Corporation Dual phase-locked loop clock synthesizer

Also Published As

Publication number Publication date
AU9120498A (en) 1999-03-16
US6028905A (en) 2000-02-22
EE200000090A (et) 2000-12-15
WO1999010983A1 (en) 1999-03-04
AU738794B2 (en) 2001-09-27
EP1012982A1 (en) 2000-06-28
KR20010052061A (ko) 2001-06-25
MY120759A (en) 2005-11-30
JP2002519904A (ja) 2002-07-02
CN1269068A (zh) 2000-10-04
CO4790200A1 (es) 1999-05-31
AR013453A1 (es) 2000-12-27

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 9A E 10A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]