BR8406084A - Disposicao de circuito para a rapida determinacao do valor da diferenca maxima entre tres valores numericos binarios - Google Patents

Disposicao de circuito para a rapida determinacao do valor da diferenca maxima entre tres valores numericos binarios

Info

Publication number
BR8406084A
BR8406084A BR8406084A BR8406084A BR8406084A BR 8406084 A BR8406084 A BR 8406084A BR 8406084 A BR8406084 A BR 8406084A BR 8406084 A BR8406084 A BR 8406084A BR 8406084 A BR8406084 A BR 8406084A
Authority
BR
Brazil
Prior art keywords
classification
maximum difference
coding
difference value
circuit arrangement
Prior art date
Application number
BR8406084A
Other languages
English (en)
Inventor
Udo Reimann
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of BR8406084A publication Critical patent/BR8406084A/pt

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/124Quantisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Gyroscopes (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
  • Dc Digital Transmission (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Analogue/Digital Conversion (AREA)
BR8406084A 1983-11-30 1984-11-29 Disposicao de circuito para a rapida determinacao do valor da diferenca maxima entre tres valores numericos binarios BR8406084A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19833343404 DE3343404A1 (de) 1983-11-30 1983-11-30 Schaltungsanordnung zur schnellen ermittlung der betragsmaessig groessten differenz von drei binaer dargestellten zahlenwerten

Publications (1)

Publication Number Publication Date
BR8406084A true BR8406084A (pt) 1985-09-24

Family

ID=6215715

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8406084A BR8406084A (pt) 1983-11-30 1984-11-29 Disposicao de circuito para a rapida determinacao do valor da diferenca maxima entre tres valores numericos binarios

Country Status (8)

Country Link
US (1) US4695971A (pt)
EP (1) EP0144066B1 (pt)
JP (1) JPS60153544A (pt)
AT (1) ATE46417T1 (pt)
AU (1) AU551157B2 (pt)
BR (1) BR8406084A (pt)
CA (1) CA1226952A (pt)
DE (2) DE3343404A1 (pt)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1251555A (en) * 1984-12-19 1989-03-21 Tetsujiro Kondo High efficiency technique for coding a digital video signal
JPH0793724B2 (ja) * 1984-12-21 1995-10-09 ソニー株式会社 テレビジョン信号の高能率符号化装置及び符号化方法
AU606559B2 (en) * 1987-12-24 1991-02-07 Nec Corporation Circuit for comparing a plurality of binary inputs
US5394351A (en) * 1994-03-11 1995-02-28 Nexgen, Inc. Optimized binary adder and comparator having an implicit constant for an input
US5418736A (en) * 1994-03-11 1995-05-23 Nexgen, Inc. Optimized binary adders and comparators for inputs having different widths
JPH1032495A (ja) * 1996-07-18 1998-02-03 Sony Corp データ処理装置および方法
DE10010457A1 (de) 2000-03-03 2001-09-20 Infineon Technologies Ag Integrierter Speicher mit Speicherzellen mit magnetoresistivem Speichereffekt
US7653673B1 (en) * 2005-07-19 2010-01-26 National Semiconductor Corporation Efficient method for identifying few largest differences from a list of numbers

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3196262A (en) * 1961-12-14 1965-07-20 Gen Electric Binary comparator
BE632507A (pt) * 1962-05-31
US3434109A (en) * 1966-06-01 1969-03-18 Cutler Hammer Inc Multifield comparator adjustable to compare any combinations of fields and to provide selectable bases of comparison
DE2740945C3 (de) * 1977-09-10 1982-02-11 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Übertragen von Bildsignalen mit Hilfe der Differenz-Puls-Code-Modulation (DPCM) und geste uertem Quantisierer
US4410960A (en) * 1980-02-05 1983-10-18 Nippon Electric Co., Ltd. Sorting circuit for three or more inputs
JPS56136093A (en) * 1980-03-26 1981-10-23 Fuji Photo Film Co Ltd Adaptive quantizer
DE3036065A1 (de) * 1980-09-25 1982-05-06 Deutsche Itt Industries Gmbh, 7800 Freiburg Binaere mos-parallel-komparatoren
DE3331426A1 (de) * 1983-08-31 1985-03-14 Siemens AG, 1000 Berlin und 8000 München Anordnung zur zweidimensionalen dpcm-codierung

Also Published As

Publication number Publication date
ATE46417T1 (de) 1989-09-15
EP0144066A2 (de) 1985-06-12
EP0144066A3 (en) 1985-07-17
JPH0250491B2 (pt) 1990-11-02
DE3343404A1 (de) 1985-06-05
AU551157B2 (en) 1986-04-17
JPS60153544A (ja) 1985-08-13
DE3479778D1 (en) 1989-10-19
AU3599884A (en) 1985-06-13
EP0144066B1 (de) 1989-09-13
CA1226952A (en) 1987-09-15
US4695971A (en) 1987-09-22

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