BR8103929A - Circuito sincronizador para a recepcao de sinal de modulacao de codigo de pulso - Google Patents

Circuito sincronizador para a recepcao de sinal de modulacao de codigo de pulso

Info

Publication number
BR8103929A
BR8103929A BR8103929A BR8103929A BR8103929A BR 8103929 A BR8103929 A BR 8103929A BR 8103929 A BR8103929 A BR 8103929A BR 8103929 A BR8103929 A BR 8103929A BR 8103929 A BR8103929 A BR 8103929A
Authority
BR
Brazil
Prior art keywords
modulation signal
pulse code
code modulation
receiving pulse
synchronizer circuit
Prior art date
Application number
BR8103929A
Other languages
English (en)
Portuguese (pt)
Inventor
R Donne
Original Assignee
Italtel Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Italtel Spa filed Critical Italtel Spa
Publication of BR8103929A publication Critical patent/BR8103929A/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
BR8103929A 1980-06-30 1981-06-23 Circuito sincronizador para a recepcao de sinal de modulacao de codigo de pulso BR8103929A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT23104/80A IT1151019B (it) 1980-06-30 1980-06-30 Circuito di temporizzazione per la ricezione di segnali pcm

Publications (1)

Publication Number Publication Date
BR8103929A true BR8103929A (pt) 1982-03-09

Family

ID=11203820

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8103929A BR8103929A (pt) 1980-06-30 1981-06-23 Circuito sincronizador para a recepcao de sinal de modulacao de codigo de pulso

Country Status (6)

Country Link
US (1) US4394758A (enExample)
BR (1) BR8103929A (enExample)
DE (1) DE3125723C2 (enExample)
FR (1) FR2488466A1 (enExample)
GB (1) GB2080076B (enExample)
IT (1) IT1151019B (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3212450A1 (de) * 1982-04-02 1983-10-13 Siemens AG, 1000 Berlin und 8000 München Synchronisiereinrichtung einer digitalsignal-demultiplexeinrichung
DE3215975C1 (en) * 1982-04-29 1990-12-20 Siemens Ag Multi-channel directional ratio system - combines available channels on transmitting side in digital form in time-multiplexing framework
FR2657741B1 (fr) * 1990-01-29 1992-04-03 Cit Alcatel Interface de restructuration de trames pour trains numeriques multiplexes par multiplexage temporel d'affluents numeriques a differents debits.
US5251210A (en) * 1991-11-01 1993-10-05 Ibm Corporation Method and apparatus for transforming low bandwidth telecommunications channels into a high bandwidth telecommunication channel
US5539783A (en) * 1995-05-18 1996-07-23 Hazeltine Corporation Non-coherent synchronization signal detector
US6647028B1 (en) 1997-09-30 2003-11-11 Cisco Technology, Inc. System and method for recovering and restoring lost data in a N-channel coherent data transmission system

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB974742A (en) * 1960-02-12 1964-11-11 Nippon Electric Co A synchronising system for a time division multiplex code modulation system
FR2291654A1 (fr) * 1974-11-14 1976-06-11 Trt Telecom Radio Electr Systeme de transmission multiplex
FR2296973A1 (fr) * 1974-12-31 1976-07-30 Telecommunications Sa Systeme de transmission numerique permettant le transfert de voies composantes entre voies multiplexees
IT1037256B (it) * 1975-04-14 1979-11-10 Sits Soc It Telecom Siemens Rete di transito per sistemi di telecomunicazioni a divisione di tempo
FR2320023A1 (fr) * 1975-07-28 1977-02-25 Constr Telephoniques Procede et dispositif de resynchronisation d'informations entrantes structurees en trames
CH621445A5 (enExample) * 1976-09-09 1981-01-30 Gretag Ag
US4095051A (en) * 1976-12-15 1978-06-13 Bell Telephone Laboratories, Incorporated Demultiplexer circuit
US4133978A (en) * 1977-08-25 1979-01-09 General Electric Company Circuit for separating a composite stream of data and clock pulses
NL176420C (nl) * 1977-09-29 1985-04-01 Nederlanden Staat Synchronisatieinrichting voor het afgeven van een met een in een inkomend digitaal signaal aanwezig synchronisatieteken overeenkomend synchronisatiesignaal.
DE2900970C3 (de) * 1977-11-24 1982-04-08 Siemens AG, 1000 Berlin und 8000 München Prüfsignalgenerator
US4224473A (en) * 1978-05-31 1980-09-23 Digital Communications Corporation TDMA Multiplexer-demultiplexer with multiple ports
CH643696A5 (en) * 1979-02-08 1984-06-15 Siemens Ag Albis Synchronisation device for a PCM system
DE2936938C2 (de) * 1979-09-12 1987-01-08 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum Ausgleich der Phasenunterschiede zwischen dem Streckentakt auf einer mit einer PCM-Vermittlungsstelle verbindenden PCM-Zeitmultiplexleitung und dem Amtstakt dieser Vermittlungsstelle
IT1207258B (it) * 1979-10-11 1989-05-17 Sits Soc It Telecom Siemens Disposizione circuitale atta a riconoscere la parola di allineamento, di particolare applicazione nella sezione ricevente di un multiplatore disegnali digitali.

Also Published As

Publication number Publication date
FR2488466A1 (fr) 1982-02-12
DE3125723A1 (de) 1982-03-11
DE3125723C2 (de) 1987-02-12
IT1151019B (it) 1986-12-17
US4394758A (en) 1983-07-19
GB2080076A (en) 1982-01-27
FR2488466B1 (enExample) 1984-04-20
GB2080076B (en) 1984-05-31
IT8023104A0 (it) 1980-06-30

Similar Documents

Publication Publication Date Title
AR224442A1 (es) Un dispositivo de ligadura quirurgica
ES539308A0 (es) Procedimiento de montaje de un mecanismo de desembrague
ES528367A0 (es) Perfeccionamientos en un disco de embrague
DK500981A (da) Koblingsmekanisme
IT1133938B (it) Botte a cucchiumi
GB2097560B (en) Apparatus for reproducing a pulse code modulated signal
RO84360A (ro) Procedeu de recuperare a betainei
ES527389A0 (es) Perfeccionamientos en un disco de embrague
BR8108424A (pt) Unidade de registro sensivel a pressao
ES505737A0 (es) Perfeccionamientos en un circuito sincronizador de senales
ES523428A0 (es) Procedimiento de fabricacion de un mecanismo de embrague
ATE4524T1 (de) Synchronisiereinrichtung fuer ein zeitmultiplexsystem.
EP0116617A4 (en) AUTOMATIC DIGITAL TELEPHONE CONTROL UNIT WITH PULSE CODE MODULATION.
IT8312588A0 (it) Comando d innesto a frizione
DK257185A (da) Fremgangsmaade til evaluering af en subkode
ES550257A0 (es) Un mecanismo de extraccion de cinta
IT8125813A0 (it) Circuito di verifica di tolleranza di impulsi di orologio.
ES503441A0 (es) Circuito de control de seguridad para un aguilon
BR8103929A (pt) Circuito sincronizador para a recepcao de sinal de modulacao de codigo de pulso
MX149256A (es) Mejoras a circuito de deteccion de datos para un sistema de interpolacion de comunicacion oral por asignacion de tiempo
FR2495247B1 (fr) Frein a disque comportant un dispositif anti-cliquetis
ES503491A0 (es) Un procedimiento de preparacion de metafenilendiaminas
NO802585L (no) Styrekobling for et belysningssystem.
IT8523100A0 (it) Circuito sommatore per campioni codificati di modulazione a impulsi codificati.
IT1154045B (it) Circuito fail safe per accusare ricevuta di un segnale