BR7904452A - Aparelho de aceleracao de traducao de enderecos virtuais - Google Patents

Aparelho de aceleracao de traducao de enderecos virtuais

Info

Publication number
BR7904452A
BR7904452A BR7904452A BR7904452A BR7904452A BR 7904452 A BR7904452 A BR 7904452A BR 7904452 A BR7904452 A BR 7904452A BR 7904452 A BR7904452 A BR 7904452A BR 7904452 A BR7904452 A BR 7904452A
Authority
BR
Brazil
Prior art keywords
virtual address
address translation
acceleration equipment
translation acceleration
equipment
Prior art date
Application number
BR7904452A
Other languages
English (en)
Inventor
D Kindseth
T Beacom
G Mitchell
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR7904452A publication Critical patent/BR7904452A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
BR7904452A 1978-07-17 1979-07-12 Aparelho de aceleracao de traducao de enderecos virtuais BR7904452A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/925,148 US4170039A (en) 1978-07-17 1978-07-17 Virtual address translation speed up technique

Publications (1)

Publication Number Publication Date
BR7904452A true BR7904452A (pt) 1980-04-08

Family

ID=25451289

Family Applications (1)

Application Number Title Priority Date Filing Date
BR7904452A BR7904452A (pt) 1978-07-17 1979-07-12 Aparelho de aceleracao de traducao de enderecos virtuais

Country Status (5)

Country Link
US (1) US4170039A (pt)
EP (1) EP0007001B1 (pt)
JP (1) JPS5528595A (pt)
BR (1) BR7904452A (pt)
DE (1) DE2963530D1 (pt)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4292674A (en) * 1979-07-27 1981-09-29 Sperry Corporation One word buffer memory system
JPS5764383A (en) * 1980-10-03 1982-04-19 Toshiba Corp Address converting method and its device
US4531199A (en) * 1981-06-01 1985-07-23 International Business Machines Corporation Binary number substitution mechanism in a control store element
US4510582A (en) * 1981-06-01 1985-04-09 International Business Machines Corp. Binary number substitution mechanism
JPS6047623B2 (ja) * 1982-02-12 1985-10-22 株式会社日立製作所 アドレス変換方式
US4539637A (en) * 1982-08-26 1985-09-03 At&T Bell Laboratories Method and apparatus for handling interprocessor calls in a multiprocessor system
USRE37305E1 (en) * 1982-12-30 2001-07-31 International Business Machines Corporation Virtual memory address translation mechanism with controlled data persistence
US4602368A (en) * 1983-04-15 1986-07-22 Honeywell Information Systems Inc. Dual validity bit arrays
US4580217A (en) * 1983-06-22 1986-04-01 Ncr Corporation High speed memory management system and method
US4589092A (en) * 1983-12-12 1986-05-13 International Business Machines Corporation Data buffer having separate lock bit storage array
US4648033A (en) * 1984-09-07 1987-03-03 International Business Machines Corporation Look-aside buffer LRU marker controller
JPH0652511B2 (ja) * 1984-12-14 1994-07-06 株式会社日立製作所 情報処理装置のアドレス変換方式
US4737909A (en) * 1985-04-01 1988-04-12 National Semiconductor Corp. Cache memory address apparatus
US4914582A (en) * 1986-06-27 1990-04-03 Hewlett-Packard Company Cache tag lookaside
US4922417A (en) * 1986-10-24 1990-05-01 American Telephone And Telegraph Company Method and apparatus for data hashing using selection from a table of random numbers in combination with folding and bit manipulation of the selected random numbers
IT1202687B (it) * 1987-03-25 1989-02-09 Honeywell Inf Systems Memoria tampone a predizione di hit
US5249276A (en) * 1987-06-22 1993-09-28 Hitachi, Ltd. Address translation apparatus having a memory access privilege check capability data which uses mask data to select bit positions of priviledge
ES2090023T3 (es) * 1988-06-07 1996-10-16 Bull Hn Information Syst Aparato y metodo para una conversion mejorada entre direccion virtual y direccion real para acceder a una unidad de memoria cache.
JPH02205953A (ja) * 1989-02-03 1990-08-15 Nec Corp アドレス変換装置
US5099415A (en) * 1989-02-15 1992-03-24 International Business Machines Guess mechanism for virtual address translation
US5226133A (en) * 1989-12-01 1993-07-06 Silicon Graphics, Inc. Two-level translation look-aside buffer using partial addresses for enhanced speed
US20040054867A1 (en) * 2002-09-13 2004-03-18 Paulus Stravers Translation lookaside buffer
US7013355B2 (en) * 2003-01-09 2006-03-14 Micrel, Incorporated Device and method for improved serial bus transaction using incremental address decode

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6806735A (pt) * 1968-05-11 1969-11-13
US3693165A (en) * 1971-06-29 1972-09-19 Ibm Parallel addressing of a storage hierarchy in a data processing system using virtual addressing
US3761881A (en) * 1971-06-30 1973-09-25 Ibm Translation storage scheme for virtual memory system
DE2134816C3 (de) * 1971-07-13 1978-04-27 Ibm Deutschland Gmbh, 7000 Stuttgart Einrichtung zur Adressenübersetzung
US3723976A (en) * 1972-01-20 1973-03-27 Ibm Memory system with logical and real addressing
US3781808A (en) * 1972-10-17 1973-12-25 Ibm Virtual memory system
US3825904A (en) * 1973-06-08 1974-07-23 Ibm Virtual memory system
US3938100A (en) * 1974-06-07 1976-02-10 Control Data Corporation Virtual addressing apparatus for addressing the memory of a computer utilizing associative addressing techniques
JPS5615066B2 (pt) * 1974-06-13 1981-04-08
JPS51115737A (en) * 1975-03-24 1976-10-12 Hitachi Ltd Adress conversion versus control system
US3976978A (en) * 1975-03-26 1976-08-24 Honeywell Information Systems, Inc. Method of generating addresses to a paged memory
DE2523686A1 (de) * 1975-05-28 1976-12-02 Siemens Ag Einrichtung und verfahren zur adressuebersetzung in einem multiprozessorsystem mit virtueller adressierung
FR2337373A1 (fr) * 1975-12-31 1977-07-29 Honeywell Bull Soc Ind Dispositif de developpement d'adresse faisant intervenir une nouvelle technique de pagination
DE2601379C3 (de) * 1976-01-15 1980-11-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung zum Umwandeln virtueller Adressen in reelle Adressen
DE2605617A1 (de) * 1976-02-12 1977-08-18 Siemens Ag Schaltungsanordnung zum adressieren von daten
US4050094A (en) * 1976-04-30 1977-09-20 International Business Machines Corporation Translator lookahead controls
JPS52149444A (en) * 1976-06-08 1977-12-12 Fujitsu Ltd Multiplex virtual space processing data processing system
US4053948A (en) * 1976-06-21 1977-10-11 Ibm Corporation Look aside array invalidation mechanism

Also Published As

Publication number Publication date
EP0007001A1 (en) 1980-01-23
DE2963530D1 (en) 1982-10-07
US4170039A (en) 1979-10-02
JPS5528595A (en) 1980-02-29
JPS5729786B2 (pt) 1982-06-24
EP0007001B1 (en) 1982-08-11

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