BR7803165A - Unidade interface adaptada para ativar a troca de dados com alta velocidade entre a memoria principal de um processador e uma unidade remota - Google Patents

Unidade interface adaptada para ativar a troca de dados com alta velocidade entre a memoria principal de um processador e uma unidade remota

Info

Publication number
BR7803165A
BR7803165A BR7803165A BR7803165A BR7803165A BR 7803165 A BR7803165 A BR 7803165A BR 7803165 A BR7803165 A BR 7803165A BR 7803165 A BR7803165 A BR 7803165A BR 7803165 A BR7803165 A BR 7803165A
Authority
BR
Brazil
Prior art keywords
processor
high speed
main memory
data exchange
speed data
Prior art date
Application number
BR7803165A
Other languages
English (en)
Inventor
M Bambara
A Ravegneti
Original Assignee
Siemens Spa Italiana
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Spa Italiana filed Critical Siemens Spa Italiana
Publication of BR7803165A publication Critical patent/BR7803165A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G06F13/34—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/285—Halt processor DMA

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
BR7803165A 1977-07-07 1978-05-19 Unidade interface adaptada para ativar a troca de dados com alta velocidade entre a memoria principal de um processador e uma unidade remota BR7803165A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT25473/77A IT1113771B (it) 1977-07-07 1977-07-07 Unita' di interfaccia atta a consentire lo scambio di dati a velocita' elevata tra la memoria centrale di un elaboratore ed una unita' periferica

Publications (1)

Publication Number Publication Date
BR7803165A true BR7803165A (pt) 1979-03-06

Family

ID=11216795

Family Applications (1)

Application Number Title Priority Date Filing Date
BR7803165A BR7803165A (pt) 1977-07-07 1978-05-19 Unidade interface adaptada para ativar a troca de dados com alta velocidade entre a memoria principal de um processador e uma unidade remota

Country Status (7)

Country Link
US (1) US4209841A (pt)
AU (1) AU513997B2 (pt)
BR (1) BR7803165A (pt)
DE (1) DE2829972A1 (pt)
IT (1) IT1113771B (pt)
MX (1) MX144241A (pt)
NZ (1) NZ187107A (pt)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4315308A (en) * 1978-12-21 1982-02-09 Intel Corporation Interface between a microprocessor chip and peripheral subsystems
EP0050109B1 (en) * 1980-02-28 1984-10-31 Intel Corporation Microprocessor interface control apparatus
US4443850A (en) * 1981-12-01 1984-04-17 Burroughs Corporation Interface circuit for subsystem controller
US4471427A (en) * 1981-12-01 1984-09-11 Burroughs Corporation Direct memory access logic system for a data transfer network
US4672605A (en) * 1984-03-20 1987-06-09 Applied Spectrum Technologies, Inc. Data and voice communications system
US4761762A (en) * 1986-04-10 1988-08-02 The United States Of America As Represented By The Secretary Of The Air Force Interrupt control switch interface system
US5261074A (en) * 1988-10-03 1993-11-09 Silicon Graphics, Inc. Computer write-initiated special transferoperation
EP0436641B1 (en) * 1988-10-03 1996-04-03 Silicon Graphics, Inc. Computer three-way transfer operation
US5377332A (en) * 1989-10-02 1994-12-27 Data General Corporation Bus arbitration algorithm and apparatus
US5058054A (en) * 1990-02-06 1991-10-15 Analogic Corporation Data transmission device for interfacing between a first rate data acquisition system and a second rate data processing system
US5517670A (en) * 1992-12-30 1996-05-14 International Business Machines Corporation Adaptive data transfer channel employing extended data block capability
US5717908A (en) * 1993-02-25 1998-02-10 Intel Corporation Pattern recognition system using a four address arithmetic logic unit
US5825921A (en) * 1993-03-19 1998-10-20 Intel Corporation Memory transfer apparatus and method useful within a pattern recognition system
US5581790A (en) * 1994-06-07 1996-12-03 Unisys Corporation Data feeder control system for performing data integrity check while transferring predetermined number of blocks with variable bytes through a selected one of many channels
US8700819B2 (en) * 2011-03-09 2014-04-15 Apple Inc. Host device suspending communication link to client device based on client device notification

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4040026A (en) * 1974-05-08 1977-08-02 Francois Gernelle Channel for exchanging information between a computer and rapid peripheral units
FR2333299A1 (fr) * 1975-11-27 1977-06-24 Honeywell Bull Soc Ind Perfectionnement a une interface de liaison d'une unite de traitement de donnees a un poste de travail
US4067059A (en) * 1976-01-29 1978-01-03 Sperry Rand Corporation Shared direct memory access controller

Also Published As

Publication number Publication date
AU3487478A (en) 1979-10-11
MX144241A (es) 1981-09-14
NZ187107A (en) 1981-10-19
AU513997B2 (en) 1981-01-15
IT1113771B (it) 1986-01-20
DE2829972A1 (de) 1979-01-18
US4209841A (en) 1980-06-24

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