BR7409551A - Gerador aperfeicoado para produzir sinais de saida que comandam sistemas redundantes - Google Patents

Gerador aperfeicoado para produzir sinais de saida que comandam sistemas redundantes

Info

Publication number
BR7409551A
BR7409551A BR9551/74A BR955174A BR7409551A BR 7409551 A BR7409551 A BR 7409551A BR 9551/74 A BR9551/74 A BR 9551/74A BR 955174 A BR955174 A BR 955174A BR 7409551 A BR7409551 A BR 7409551A
Authority
BR
Brazil
Prior art keywords
command
produce output
redundant systems
perfect
output signs
Prior art date
Application number
BR9551/74A
Other languages
English (en)
Portuguese (pt)
Inventor
W Ullmann
R Derighetti
U Gagliati
Original Assignee
Agie Ag Ind Elektronik
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agie Ag Ind Elektronik filed Critical Agie Ag Ind Elektronik
Publication of BR7409551A publication Critical patent/BR7409551A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00392—Modifications for increasing the reliability for protection by circuit redundancy

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Safety Devices In Control Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Hardware Redundancy (AREA)
  • Control Of Stepping Motors (AREA)
BR9551/74A 1973-11-14 1974-11-13 Gerador aperfeicoado para produzir sinais de saida que comandam sistemas redundantes BR7409551A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH1599473A CH623669A5 (forum.php) 1973-11-14 1973-11-14

Publications (1)

Publication Number Publication Date
BR7409551A true BR7409551A (pt) 1976-05-25

Family

ID=4413638

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9551/74A BR7409551A (pt) 1973-11-14 1974-11-13 Gerador aperfeicoado para produzir sinais de saida que comandam sistemas redundantes

Country Status (11)

Country Link
US (1) US3961270A (forum.php)
JP (1) JPS5079680A (forum.php)
BE (1) BE815136A (forum.php)
BR (1) BR7409551A (forum.php)
CH (1) CH623669A5 (forum.php)
DE (1) DE2423276C3 (forum.php)
FR (1) FR2251052B1 (forum.php)
GB (1) GB1492806A (forum.php)
IT (1) IT1030775B (forum.php)
SE (1) SE396263B (forum.php)
ZA (1) ZA747098B (forum.php)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4019143A (en) * 1976-05-10 1977-04-19 Bell Telephone Laboratories, Incorporated Standby apparatus for clock signal generators
US4239982A (en) * 1978-06-14 1980-12-16 The Charles Stark Draper Laboratory, Inc. Fault-tolerant clock system
DE3023624C1 (de) * 1980-06-24 1981-10-01 Siemens AG, 1000 Berlin und 8000 München Taktgebareanordnung zum Erzeugen von Stauerimpulsen fuer ein redundantes Datenverarbeitungssystem
JPS6030898B2 (ja) * 1981-05-15 1985-07-19 テクトロニクス・インコ−ポレイテツド ロジツク・アナライザの入力装置
DE3225429A1 (de) * 1982-07-07 1984-01-12 Siemens AG, 1000 Berlin und 8000 München Taktgeberanordnung fuer ein redundantes steuersystem
NL8203921A (nl) * 1982-10-11 1984-05-01 Philips Nv Multipel redundant kloksysteem, bevattende een aantal onderling synchroniserende klokken, en klokschakeling voor gebruik in zo een kloksysteem.
US4733353A (en) * 1985-12-13 1988-03-22 General Electric Company Frame synchronization of multiply redundant computers
EP0306211A3 (en) * 1987-09-04 1990-09-26 Digital Equipment Corporation Synchronized twin computer system
US5185877A (en) * 1987-09-04 1993-02-09 Digital Equipment Corporation Protocol for transfer of DMA data
US4798976A (en) * 1987-11-13 1989-01-17 International Business Machines Corporation Logic redundancy circuit scheme
US4932040A (en) * 1987-12-07 1990-06-05 Bull Hn Information Systems Inc. Bidirectional control signalling bus interface apparatus for transmitting signals between two bus systems
US4977581A (en) * 1988-08-18 1990-12-11 Unisys Corporation Multiple frequency clock system
US5163138A (en) * 1989-08-01 1992-11-10 Digital Equipment Corporation Protocol for read write transfers via switching logic by transmitting and retransmitting an address
US5153881A (en) * 1989-08-01 1992-10-06 Digital Equipment Corporation Method of handling errors in software
US5068780A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones
EP0415545B1 (en) * 1989-08-01 1996-06-19 Digital Equipment Corporation Method of handling errors in software
US5251227A (en) * 1989-08-01 1993-10-05 Digital Equipment Corporation Targeted resets in a data processor including a trace memory to store transactions

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3025508A (en) * 1958-07-28 1962-03-13 Sperry Rand Corp Variation of high speed redundancy check generator
US3538344A (en) * 1968-05-03 1970-11-03 Itt Synchronized starting of redundant digital dividers
US3737674A (en) * 1970-02-05 1973-06-05 Lorain Prod Corp Majority logic system
DE2046140C2 (de) * 1970-09-18 1981-12-24 Bodenseewerk Gerätetechnik GmbH, 7770 Überlingen Schaltungsanordnung zur redundanten Signalübertragung bei einem Flugregler
DE2216591B1 (de) * 1972-04-06 1973-08-09 Siemens Ag, 1000 Berlin U. 8000 Muenchen Einrichtung zum Melden und Sperren einer simultanen Befehlsgabe mehrerer Steuerbefehlsgeber einer Ablaufsteuerung

Also Published As

Publication number Publication date
DE2423276A1 (de) 1975-05-22
US3961270A (en) 1976-06-01
BE815136A (fr) 1974-09-16
SE7413900L (forum.php) 1975-05-15
SE396263B (sv) 1977-09-12
FR2251052B1 (forum.php) 1979-05-25
GB1492806A (en) 1977-11-23
CH623669A5 (forum.php) 1981-06-15
ZA747098B (en) 1975-11-26
FR2251052A1 (forum.php) 1975-06-06
IT1030775B (it) 1979-04-10
DE2423276B2 (de) 1976-08-26
DE2423276C3 (de) 1979-03-15
JPS5079680A (forum.php) 1975-06-28

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