BR112023025926A2 - Arquitetura de gerenciamento de potência hierárquica para dispositivos eletrônicos baseados em soc - Google Patents
Arquitetura de gerenciamento de potência hierárquica para dispositivos eletrônicos baseados em socInfo
- Publication number
- BR112023025926A2 BR112023025926A2 BR112023025926A BR112023025926A BR112023025926A2 BR 112023025926 A2 BR112023025926 A2 BR 112023025926A2 BR 112023025926 A BR112023025926 A BR 112023025926A BR 112023025926 A BR112023025926 A BR 112023025926A BR 112023025926 A2 BR112023025926 A2 BR 112023025926A2
- Authority
- BR
- Brazil
- Prior art keywords
- power
- domains
- power management
- soc
- electronic devices
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
- G06F1/206—Cooling means comprising thermal management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3243—Power saving in microcontroller unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Human Computer Interaction (AREA)
- Computing Systems (AREA)
- Power Sources (AREA)
Abstract
arquitetura de gerenciamento de potência hierárquica para dispositivos eletrônicos baseados em soc. um sistema eletrônico tem uma pluralidade de domínios de potência e cada domínio inclui um subconjunto de um ou mais clusters de processador, primeira memória, pmic e segunda memória. uma pluralidade de sensores de potência são distribuídos no sistema eletrônico e configurados para coletar uma pluralidade de amostras de potência dos domínios de potência. um mecanismo de gerenciamento de potência é configurado para processar as amostras de potência com base nas localizações dos sensores de potência correspondentes para gerar um ou mais perfis de potência e uma pluralidade de limites de estrangulamento de potência. o mecanismo de gerenciamento de potência é configurado para implementar uma operação de controle de potência global determinando as disponibilidades de potência dos domínios de potência em um nível de firmware e habilitando operações dos domínios de potência em conformidade. o mecanismo de gerenciamento de potência também é configurado para habilitar que uma pluralidade de operações de controle de potência local sejam implementadas diretamente nos domínios de potência com base nos limites de regulação de potência.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US202163215351P | 2021-06-25 | 2021-06-25 | |
US202163215355P | 2021-06-25 | 2021-06-25 | |
US17/701,552 US11733757B2 (en) | 2021-06-25 | 2022-03-22 | Hierarchical power management architecture for SoC-based electronic devices |
PCT/US2022/072871 WO2022272214A1 (en) | 2021-06-25 | 2022-06-10 | Hierarchical power management architecture for soc-based electronic devices |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112023025926A2 true BR112023025926A2 (pt) | 2024-02-27 |
Family
ID=82403447
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112023025926A BR112023025926A2 (pt) | 2021-06-25 | 2022-06-10 | Arquitetura de gerenciamento de potência hierárquica para dispositivos eletrônicos baseados em soc |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP4359880A1 (pt) |
KR (1) | KR20240005970A (pt) |
BR (1) | BR112023025926A2 (pt) |
TW (1) | TW202324034A (pt) |
WO (1) | WO2022272214A1 (pt) |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7337339B1 (en) * | 2005-09-15 | 2008-02-26 | Azul Systems, Inc. | Multi-level power monitoring, filtering and throttling at local blocks and globally |
US8601288B2 (en) * | 2010-08-31 | 2013-12-03 | Sonics, Inc. | Intelligent power controller |
US8769316B2 (en) * | 2011-09-06 | 2014-07-01 | Intel Corporation | Dynamically allocating a power budget over multiple domains of a processor |
US9074947B2 (en) * | 2011-09-28 | 2015-07-07 | Intel Corporation | Estimating temperature of a processor core in a low power state without thermal sensor information |
US9235252B2 (en) * | 2012-12-21 | 2016-01-12 | Intel Corporation | Dynamic balancing of power across a plurality of processor domains according to power policy control bias |
US9575537B2 (en) * | 2014-07-25 | 2017-02-21 | Intel Corporation | Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states |
US20160070327A1 (en) * | 2014-09-08 | 2016-03-10 | Qualcomm Incorporated | System and method for peak current management to a system on a chip |
US10877530B2 (en) * | 2014-12-23 | 2020-12-29 | Intel Corporation | Apparatus and method to provide a thermal parameter report for a multi-chip package |
-
2022
- 2022-06-09 TW TW111121428A patent/TW202324034A/zh unknown
- 2022-06-10 BR BR112023025926A patent/BR112023025926A2/pt unknown
- 2022-06-10 EP EP22738306.4A patent/EP4359880A1/en active Pending
- 2022-06-10 KR KR1020237043756A patent/KR20240005970A/ko not_active Application Discontinuation
- 2022-06-10 WO PCT/US2022/072871 patent/WO2022272214A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
KR20240005970A (ko) | 2024-01-12 |
WO2022272214A1 (en) | 2022-12-29 |
TW202324034A (zh) | 2023-06-16 |
EP4359880A1 (en) | 2024-05-01 |
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