BR112022001880A2 - Sincronização em fase para estimativa de retardo de tempo de ida e volta - Google Patents

Sincronização em fase para estimativa de retardo de tempo de ida e volta

Info

Publication number
BR112022001880A2
BR112022001880A2 BR112022001880A BR112022001880A BR112022001880A2 BR 112022001880 A2 BR112022001880 A2 BR 112022001880A2 BR 112022001880 A BR112022001880 A BR 112022001880A BR 112022001880 A BR112022001880 A BR 112022001880A BR 112022001880 A2 BR112022001880 A2 BR 112022001880A2
Authority
BR
Brazil
Prior art keywords
waveform
phase
pll
delay
round
Prior art date
Application number
BR112022001880A
Other languages
English (en)
Inventor
Alexander Dorosenco
Carl Hardin
Jay King
Binamira Soriaga Joseph
Patrick Burke Joseph
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112022001880A2 publication Critical patent/BR112022001880A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2657—Carrier synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/104—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional signal from outside the loop for setting or controlling a parameter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2656—Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2668—Details of algorithms
    • H04L27/2669—Details of algorithms characterised by the domain of operation
    • H04L27/2672—Frequency domain
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2668—Details of algorithms
    • H04L27/2673—Details of algorithms characterised by synchronisation parameters
    • H04L27/2676—Blind, i.e. without using known symbols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H04W56/0015—Synchronization between nodes one node acting as a reference for the others
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/0035—Synchronisation arrangements detecting errors in frequency or phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/004—Synchronisation arrangements compensating for timing error of reception due to propagation delay
    • H04W56/0045—Synchronisation arrangements compensating for timing error of reception due to propagation delay compensating for timing error by altering transmission time
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/0055—Synchronisation arrangements determining timing error of reception due to propagation delay
    • H04W56/0065—Synchronisation arrangements determining timing error of reception due to propagation delay using measurement of signal travel time
    • H04W56/009—Closed loop measurements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

sincronização em fase para estimativa de retardo de tempo de ida e volta. variações de fase entre uma forma de onda do transmissor (tx) e uma forma de onda do receptor (rx) produzidas por uma malha de sincronismo de fase (pll) tx e uma pll rx, respectivamente, é uma fonte de erro na calibração de retardo de processamento utilizado, por exemplo, em na estimativa do tempo de ida e volta (rtt). embora uma forma de onda tx e uma forma de onda rx possuam um retardo de fase constante enquanto em condições de estado estacionário, durante tempos temporários, por exemplo, na inicialização ou reinicialização, o retardo de fase pode variar tanto quanto 180, o que, em frequências de banda base de 50 mhz, introduz variações aleatórias de retardo de tanto quanto 10 nseg, o que é indesejável para a estimação de posição refinada utilizando rtt. a variação de retardo de fase entre a forma de onda tx e a forma de onda rx pode ser reduzida ou eliminada utilizando um sinal de correção de fase gerado utilizando os sinais de saída da pll tx e da pll rx.
BR112022001880A 2019-08-08 2020-07-08 Sincronização em fase para estimativa de retardo de tempo de ida e volta BR112022001880A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201962884634P 2019-08-08 2019-08-08
US16/683,162 US10931498B1 (en) 2019-08-08 2019-11-13 Phase synchronization for round trip delay estimation
PCT/US2020/041233 WO2021025820A1 (en) 2019-08-08 2020-07-08 Phase synchronization for round trip delay estimation

Publications (1)

Publication Number Publication Date
BR112022001880A2 true BR112022001880A2 (pt) 2022-03-29

Family

ID=74499513

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112022001880A BR112022001880A2 (pt) 2019-08-08 2020-07-08 Sincronização em fase para estimativa de retardo de tempo de ida e volta

Country Status (8)

Country Link
US (1) US10931498B1 (pt)
EP (1) EP4010985A1 (pt)
JP (1) JP2022543394A (pt)
KR (1) KR20220041100A (pt)
CN (1) CN114175510A (pt)
BR (1) BR112022001880A2 (pt)
TW (1) TW202110124A (pt)
WO (1) WO2021025820A1 (pt)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4078814A1 (en) 2019-12-20 2022-10-26 Telefonaktiebolaget LM Ericsson (publ) Multiple pll system with common and difference mode loop filters
US11070214B1 (en) * 2020-10-14 2021-07-20 Mellanox Technologies Denmark Aps Test circuit for a digital phase-locked loop
TWI793003B (zh) * 2022-05-05 2023-02-11 創意電子股份有限公司 消除相位雜訊之影響的校正系統與包含其的類比至數位轉換裝置
WO2023232254A1 (en) * 2022-06-02 2023-12-07 Telefonaktiebolaget Lm Ericsson (Publ) Multiple pll system with pairwise phase difference regulation
US20240106623A1 (en) * 2022-09-23 2024-03-28 Qualcomm Incorporated Phase tracking and correction architecture

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5794119A (en) * 1995-11-21 1998-08-11 Stanford Telecommunications, Inc. Subscriber frequency control system and method in point-to-multipoint RF communication system
US7996704B2 (en) * 2007-08-21 2011-08-09 Richwave Technology Corp. Asynchronous first in first out interface and operation method thereof
US7869782B2 (en) * 2007-12-14 2011-01-11 Broadcom Corporation Multi-mode transmit and receive PLL
US8009786B2 (en) * 2008-02-26 2011-08-30 Broadcom Corporation Method for agile region and band conscious frequency planning for wireless transceivers
US8452241B2 (en) * 2008-04-04 2013-05-28 Broadcom Corporation Enhanced granularity operational parameters adjustment of components and modules in a multi-band, multi-standard communication device
EP2408108A1 (en) * 2010-07-14 2012-01-18 Telefonaktiebolaget L M Ericsson AB (Publ) Clocking scheme for a wireless communication device
US8415999B2 (en) 2010-07-28 2013-04-09 International Business Machines Corporation High frequency quadrature PLL circuit and method
JP5787849B2 (ja) 2012-08-29 2015-09-30 三菱電機株式会社 周波数シンセサイザ
US9225507B1 (en) 2013-06-04 2015-12-29 Pmc-Sierra Us, Inc. System and method for synchronizing local oscillators
EP3272016A1 (en) * 2015-03-20 2018-01-24 Telefonaktiebolaget LM Ericsson (publ) Fractional plls with low correlation
US9531323B1 (en) * 2015-06-24 2016-12-27 Qualcomm Incorporated Low-power balanced crystal oscillator
US10935631B2 (en) * 2018-04-24 2021-03-02 Navico Holding As Radar transceiver with a switched local oscillator

Also Published As

Publication number Publication date
WO2021025820A1 (en) 2021-02-11
US10931498B1 (en) 2021-02-23
CN114175510A (zh) 2022-03-11
EP4010985A1 (en) 2022-06-15
US20210044472A1 (en) 2021-02-11
TW202110124A (zh) 2021-03-01
JP2022543394A (ja) 2022-10-12
KR20220041100A (ko) 2022-03-31

Similar Documents

Publication Publication Date Title
BR112022001880A2 (pt) Sincronização em fase para estimativa de retardo de tempo de ida e volta
US11177896B2 (en) Time synchronization device and time synchronization method
US20200267669A1 (en) Methods and apparatus for synchronization of media playback within a wireless network
US10868664B2 (en) Minimizing timestamp error in PTP systems
WO2017071270A1 (zh) 一种本地时钟调整方法、授时方法及装置
BR112016024426A2 (pt) circuito para gerar sinais precisos de fase de relógio para um serializador/desserializador de alta velocidade
KR20170095234A (ko) 네트워크 디바이스들의 클록들을 동기화하는 방법
US11683772B2 (en) Continuous synchronization of multiple radio devices to physical time
GB2586175A9 (en) System for timestamping events on edge devices
US9571262B2 (en) Hybrid timing for a GNSS receiver
WO2010032184A3 (en) Signal processing using timing comparison
RU2013135763A (ru) Синхронизация тактовых генераторов для дифференциальной защиты линии
JP2016061781A (ja) 試験測定システム及び複数のオシロスコープを同期させる方法
US20200045661A1 (en) Remote signal synchronization
ATE545225T1 (de) Oszillatorkalibration
CN104468014A (zh) 复杂网络环境下提高时间同步精度的方法
Khan et al. Frequency reference for crystal free radio
WO2016065642A1 (zh) 一种同步装置及方法
Inggs et al. Investigation of white rabbit for synchronization and timing of netted radar
JP6526379B2 (ja) 無線通信システム
CN112367139B (zh) 时标同步系统、时标同步方法及星载导航接收机
US9772696B2 (en) System and method for phase error compensation in synchronized devices
US20210397211A1 (en) Delay time detection circuit, stamping information generation device, and delay time detection method
CN113359948A (zh) 时间同步装置及同步方法
CN109116316B (zh) 一种闭环检测亚稳态与校正的方法