BR112015022852A2 - mecanismos de processamento de vetor que tem configurações de percurso de dados programáveis para proporcionar processamento de vetor de múltiplos modos, e processadores de vetor, sistemas, e métodos, relacionados - Google Patents

mecanismos de processamento de vetor que tem configurações de percurso de dados programáveis para proporcionar processamento de vetor de múltiplos modos, e processadores de vetor, sistemas, e métodos, relacionados

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Publication number
BR112015022852A2
BR112015022852A2 BR112015022852A BR112015022852A BR112015022852A2 BR 112015022852 A2 BR112015022852 A2 BR 112015022852A2 BR 112015022852 A BR112015022852 A BR 112015022852A BR 112015022852 A BR112015022852 A BR 112015022852A BR 112015022852 A2 BR112015022852 A2 BR 112015022852A2
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BR
Brazil
Prior art keywords
vector
vector processing
data path
path configurations
programmable data
Prior art date
Application number
BR112015022852A
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English (en)
Inventor
Khan Raheel
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112015022852A2 publication Critical patent/BR112015022852A2/pt

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)

Abstract

1/1 resumo mecanismos de processamento de vetor que tem configurações de percurso de dados programáveis para proporcionar processamento de vetor de múltiplos modos, e processadores de vetor, sistemas, e métodos, relacionados as modalidades aqui reveladas incluem mecanismos de processamento de vetor (vpes) que têm configurações programáveis de percurso de dados para proporcionar processamento de vetor de múltiplos modos. processadores de vetor relacionados, sistemas e métodos também são revelados. os vpes incluem um estágio(s) de processamento de vetor configurado para processar os dados de vetor de acordo com uma instrução de vetor executada no estágio de processamento de vetor. cada estágio de processamento de vetor inclui blocos de processamento de vetor configurados individualmente para processar os dados de vetor com base na instrução de vetor sendo executada. os blocos de processamento de vetor são capazes de proporcionar diferentes operações de vetor para diferentes tipos de instruções de vetor com base nas configurações de percurso de dados. os percursos de dados dos blocos de processamento de vetor podem ser programados para ser reprogramáveis para processar os dados de vetor diferentemente de acordo com a instrução de vetor específica sendo executada. dessa maneira, um vpe pode ser provido com sua configuração de percursos de dados programável para executar diferentes tipos de funções com base nas configurações de percurso de dados de acordo com a instrução de vetor sendo executada.
BR112015022852A 2013-03-13 2014-03-07 mecanismos de processamento de vetor que tem configurações de percurso de dados programáveis para proporcionar processamento de vetor de múltiplos modos, e processadores de vetor, sistemas, e métodos, relacionados BR112015022852A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/798,641 US9495154B2 (en) 2013-03-13 2013-03-13 Vector processing engines having programmable data path configurations for providing multi-mode vector processing, and related vector processors, systems, and methods
PCT/US2014/022162 WO2014164367A1 (en) 2013-03-13 2014-03-07 Vector processing engines having programmable data path configurations for providing multi-mode vector processing, and related vector processors, systems, and methods

Publications (1)

Publication Number Publication Date
BR112015022852A2 true BR112015022852A2 (pt) 2017-07-18

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Country Status (7)

Country Link
US (1) US9495154B2 (pt)
EP (1) EP2972968B1 (pt)
JP (1) JP6243000B2 (pt)
KR (1) KR101735742B1 (pt)
CN (1) CN105027109B (pt)
BR (1) BR112015022852A2 (pt)
WO (1) WO2014164367A1 (pt)

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Also Published As

Publication number Publication date
US9495154B2 (en) 2016-11-15
EP2972968A1 (en) 2016-01-20
JP6243000B2 (ja) 2017-12-06
WO2014164367A1 (en) 2014-10-09
CN105027109B (zh) 2019-03-08
US20140281370A1 (en) 2014-09-18
KR101735742B1 (ko) 2017-05-15
CN105027109A (zh) 2015-11-04
JP2016517570A (ja) 2016-06-16
KR20150132258A (ko) 2015-11-25
EP2972968B1 (en) 2021-11-24

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