BR0306094A - Método, aparelho e instrução para a realização de uma operação de sinal que multiplica - Google Patents

Método, aparelho e instrução para a realização de uma operação de sinal que multiplica

Info

Publication number
BR0306094A
BR0306094A BR0306094-2A BR0306094A BR0306094A BR 0306094 A BR0306094 A BR 0306094A BR 0306094 A BR0306094 A BR 0306094A BR 0306094 A BR0306094 A BR 0306094A
Authority
BR
Brazil
Prior art keywords
instruction
source operand
signal
multiplies
signal operation
Prior art date
Application number
BR0306094-2A
Other languages
English (en)
Inventor
William W Macy Jr
Huy V Nguyen
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of BR0306094A publication Critical patent/BR0306094A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/382—Reconfigurable for different fixed word lengths
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)

Abstract

"MéTODO, APARELHO E INSTRUçãO PARA A REALIZAçãO DE UMA OPERAçãO DE SINAL QUE MULTIPLICA". A presente invenção refere-se ao método, aparelho e meios de programa para realizar uma operação de sinal e multiplicação. Em uma modalidade, um aparelho inclui recursos de execução para executar uma primeira instrução. Em resposta à primeira instrução, os ditos recursos de execução armazenam em uma localização de armazenamento um valor resultante igual a um primeiro operando fonte multiplicado por um valor de sinal de um segundo operando fonte. Em algumas modalidades, o primeiro operando fonte pode ser substituído pelo resultado.
BR0306094-2A 2003-06-30 2003-12-29 Método, aparelho e instrução para a realização de uma operação de sinal que multiplica BR0306094A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/610,929 US7539714B2 (en) 2003-06-30 2003-06-30 Method, apparatus, and instruction for performing a sign operation that multiplies

Publications (1)

Publication Number Publication Date
BR0306094A true BR0306094A (pt) 2005-05-17

Family

ID=33452633

Family Applications (2)

Application Number Title Priority Date Filing Date
BRPI0306094-2A BRPI0306094B1 (pt) 2003-06-30 2003-12-29 Apparatus, method, and system for performing a signal operation that multiplies the execution of a multi-signaling operation
BR0306094-2A BR0306094A (pt) 2003-06-30 2003-12-29 Método, aparelho e instrução para a realização de uma operação de sinal que multiplica

Family Applications Before (1)

Application Number Title Priority Date Filing Date
BRPI0306094-2A BRPI0306094B1 (pt) 2003-06-30 2003-12-29 Apparatus, method, and system for performing a signal operation that multiplies the execution of a multi-signaling operation

Country Status (10)

Country Link
US (1) US7539714B2 (pt)
EP (2) EP1496432A3 (pt)
JP (1) JP4869552B2 (pt)
KR (1) KR100841131B1 (pt)
CN (1) CN1577249B (pt)
BR (2) BRPI0306094B1 (pt)
MX (1) MXPA03011899A (pt)
RU (1) RU2275677C2 (pt)
SG (1) SG144700A1 (pt)
TW (1) TWI305882B (pt)

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US8212823B2 (en) * 2005-09-28 2012-07-03 Synopsys, Inc. Systems and methods for accelerating sub-pixel interpolation in video processing applications
US20080071851A1 (en) * 2006-09-20 2008-03-20 Ronen Zohar Instruction and logic for performing a dot-product operation
US20090113174A1 (en) * 2007-10-31 2009-04-30 Texas Instruments Incorporated Sign Operation Instructions and Circuitry
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WO2010047344A1 (ja) * 2008-10-24 2010-04-29 シャープ株式会社 表示装置および表示装置の駆動方法
US9747105B2 (en) * 2009-12-17 2017-08-29 Intel Corporation Method and apparatus for performing a shift and exclusive or operation in a single instruction
US9003170B2 (en) * 2009-12-22 2015-04-07 Intel Corporation Bit range isolation instructions, methods, and apparatus
PL3226560T3 (pl) * 2010-07-14 2019-12-31 Ntt Docomo, Inc. Predykcja wewnątrzramkowa o małej złożoności do kodowania wideo
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US9501276B2 (en) * 2012-12-31 2016-11-22 Intel Corporation Instructions and logic to vectorize conditional loops
US9207941B2 (en) * 2013-03-15 2015-12-08 Intel Corporation Systems, apparatuses, and methods for reducing the number of short integer multiplications
CN103995475B (zh) * 2014-05-16 2016-05-18 北京航空航天大学 一种柔性嵌入式被测设备模拟器
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US10346944B2 (en) * 2017-04-09 2019-07-09 Intel Corporation Machine learning sparse computation mechanism
CN108733347B (zh) * 2017-04-20 2021-01-29 杭州海康威视数字技术股份有限公司 一种数据处理方法及装置
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RU2666285C1 (ru) * 2017-10-06 2018-09-06 Федеральное государственное бюджетное образовательное учреждение высшего образования "Вятский государственный университет" (ВятГУ) Способ организации выполнения операции умножения двух чисел в модулярно-логарифмическом формате представления с плавающей точкой на гибридных многоядерных процессорах
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Also Published As

Publication number Publication date
KR20050005729A (ko) 2005-01-14
KR100841131B1 (ko) 2008-06-24
TW200500878A (en) 2005-01-01
EP1496432A3 (en) 2007-12-12
EP2284694B1 (en) 2013-05-15
US7539714B2 (en) 2009-05-26
MXPA03011899A (es) 2005-01-13
RU2275677C2 (ru) 2006-04-27
JP2005025719A (ja) 2005-01-27
US20040267858A1 (en) 2004-12-30
EP1496432A2 (en) 2005-01-12
CN1577249A (zh) 2005-02-09
EP2284694A1 (en) 2011-02-16
RU2003137709A (ru) 2005-06-10
TWI305882B (en) 2009-02-01
SG144700A1 (en) 2008-08-28
CN1577249B (zh) 2010-04-14
JP4869552B2 (ja) 2012-02-08
BRPI0306094B1 (pt) 2017-06-27

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Legal Events

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B15K Others concerning applications: alteration of classification

Free format text: A CLASSIFICACAO ANTERIOR ERA: G06F 7/52

Ipc: G06F 9/38 (2006.01), G06F 15/80 (2006.01), G06F 7/

B07A Application suspended after technical examination (opinion) [chapter 7.1 patent gazette]
B06A Patent application procedure suspended [chapter 6.1 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]
B21F Lapse acc. art. 78, item iv - on non-payment of the annual fees in time

Free format text: REFERENTE A 15A ANUIDADE.

B24J Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12)

Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2495 DE 30-10-2018 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.