BR0206992A - Ligação de microprocessador para computador e processo para a organização do acesso a dados arquivados em uma memória - Google Patents

Ligação de microprocessador para computador e processo para a organização do acesso a dados arquivados em uma memória

Info

Publication number
BR0206992A
BR0206992A BR0206992-0A BR0206992A BR0206992A BR 0206992 A BR0206992 A BR 0206992A BR 0206992 A BR0206992 A BR 0206992A BR 0206992 A BR0206992 A BR 0206992A
Authority
BR
Brazil
Prior art keywords
memory
memory area
identifier
assigned
storing
Prior art date
Application number
BR0206992-0A
Other languages
English (en)
Inventor
Franz-Josef Bruecklmayr
Hans Friedinger
Holger Sedlak
Christian May
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Publication of BR0206992A publication Critical patent/BR0206992A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Physics (AREA)
  • Storage Device Security (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Communication Control (AREA)

Abstract

"LIGAçãO DE MICROPROCESSADOR PARA COMPUTADOR E PROCESSO PARA A ORGANIZAçãO DO ACESSO A DADOS ARQUIVADOS EM UMA MEMóRIA". A invenção refere-se a uma ligação de microprocessador para a organização do acesso a dados ou programas arquivados em uma memória com, pelo menos, um microprocessador, uma memória para um sistema operacional e, pelo menos, uma memória para a programação livre com programas externos individuais, sendo que na memória para a programação livre estão previstas várias áreas da memória com os respectivos espaços de endereços, sendo que a cada espaço de endereço está coordenado um identificador. A ligação de microprocessador apresenta, além disso, meios que carregam o identificador respectivamente coordenado a uma área da memória, respectivamente antes do endereçamento da área da memória em um primeiro registro auxiliar, e que carregam o identificador da área da memória endereçada em um segundo registro auxiliar, e que efetuam uma comparação do primeiro e do segundo registro auxiliar. Além disso está previsto coordenar, a cada espaço de endereço de uma área da memória, pelo menos, uma seq³ência de bit que contém um direito de acesso, pelo que ordens de código e dados sensíveis podem ser protegidos contra acessos estritos de outros programas externos.
BR0206992-0A 2001-02-06 2002-01-25 Ligação de microprocessador para computador e processo para a organização do acesso a dados arquivados em uma memória BR0206992A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10105284A DE10105284A1 (de) 2001-02-06 2001-02-06 Mikroprozessorschaltung für Datenträger und Verfahren zum Organisieren des Zugriffs auf in einem Speicher abgelegten Daten
PCT/DE2002/000256 WO2002063463A2 (de) 2001-02-06 2002-01-25 Mikroprozessorschaltung für datenträger und verfahren zum organisieren des zugriffs auf in einem speicher abgelegten daten

Publications (1)

Publication Number Publication Date
BR0206992A true BR0206992A (pt) 2004-02-10

Family

ID=7672999

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0206992-0A BR0206992A (pt) 2001-02-06 2002-01-25 Ligação de microprocessador para computador e processo para a organização do acesso a dados arquivados em uma memória

Country Status (13)

Country Link
US (1) US7260690B2 (pt)
EP (1) EP1358558B1 (pt)
JP (1) JP3878134B2 (pt)
KR (1) KR100574747B1 (pt)
CN (1) CN1320465C (pt)
AT (1) ATE505763T1 (pt)
BR (1) BR0206992A (pt)
DE (2) DE10105284A1 (pt)
MX (1) MXPA03007023A (pt)
RU (1) RU2266559C2 (pt)
TW (1) TWI259365B (pt)
UA (1) UA74238C2 (pt)
WO (1) WO2002063463A2 (pt)

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US20060136679A1 (en) * 2004-12-21 2006-06-22 O'connor Dennis M Protected processing apparatus, systems, and methods
JP2007052481A (ja) * 2005-08-15 2007-03-01 Matsushita Electric Ind Co Ltd Ｉｃカード用ｌｓｉ
JP4519738B2 (ja) * 2005-08-26 2010-08-04 株式会社東芝 メモリアクセス制御装置
US7882318B2 (en) * 2006-09-29 2011-02-01 Intel Corporation Tamper protection of software agents operating in a vitual technology environment methods and apparatuses
US7802050B2 (en) * 2006-09-29 2010-09-21 Intel Corporation Monitoring a target agent execution pattern on a VT-enabled system
US8739304B2 (en) * 2006-11-10 2014-05-27 Sony Computer Entertainment Inc. Providing content using hybrid media distribution scheme with enhanced security
US8752199B2 (en) * 2006-11-10 2014-06-10 Sony Computer Entertainment Inc. Hybrid media distribution with enhanced security
US20100325077A1 (en) * 2007-02-21 2010-12-23 Naoshi Higuchi Computer, operation rule application method and operating system
JP4939387B2 (ja) 2007-12-06 2012-05-23 ルネサスエレクトロニクス株式会社 データ処理装置及びアドレス空間保護方法
DE102008029231B4 (de) * 2008-06-19 2010-12-02 Lars Gollub Prozessor mit Ansprungbefehlen zur Überwachung des Kontrollflusses
US20110225654A1 (en) * 2008-08-25 2011-09-15 Mao-Huai Weng Write-Proof Protection Method of a Storage Device
US8682639B2 (en) * 2010-09-21 2014-03-25 Texas Instruments Incorporated Dedicated memory window for emulation address
DE102013218646B4 (de) 2012-09-18 2023-01-19 Denso Corporation Verarbeitungsvorrichtung
JP2014174758A (ja) * 2013-03-08 2014-09-22 Denso Corp 処理装置
JP6323235B2 (ja) * 2014-07-29 2018-05-16 株式会社デンソー 電子制御装置
US10129035B2 (en) * 2015-08-10 2018-11-13 Data I/O Corporation Device birth certificate

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Also Published As

Publication number Publication date
DE10105284A1 (de) 2002-08-29
WO2002063463A2 (de) 2002-08-15
US20040088509A1 (en) 2004-05-06
MXPA03007023A (es) 2004-12-06
RU2266559C2 (ru) 2005-12-20
JP3878134B2 (ja) 2007-02-07
US7260690B2 (en) 2007-08-21
EP1358558A2 (de) 2003-11-05
CN1320465C (zh) 2007-06-06
KR100574747B1 (ko) 2006-04-28
WO2002063463A3 (de) 2003-02-06
DE50215002D1 (de) 2011-05-26
ATE505763T1 (de) 2011-04-15
TWI259365B (en) 2006-08-01
EP1358558B1 (de) 2011-04-13
CN1491388A (zh) 2004-04-21
KR20030084921A (ko) 2003-11-01
RU2003127063A (ru) 2005-01-10
JP2004526237A (ja) 2004-08-26
UA74238C2 (uk) 2005-11-15

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Legal Events

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 9A ANUIDADE(S).

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2103 DE 26/04/2011.