BR0010620A - Método com proteção para substituição dos menos recentemente usados - Google Patents

Método com proteção para substituição dos menos recentemente usados

Info

Publication number
BR0010620A
BR0010620A BR0010620-8A BR0010620A BR0010620A BR 0010620 A BR0010620 A BR 0010620A BR 0010620 A BR0010620 A BR 0010620A BR 0010620 A BR0010620 A BR 0010620A
Authority
BR
Brazil
Prior art keywords
list
protection
filter
reuse
cache
Prior art date
Application number
BR0010620-8A
Other languages
English (en)
Portuguese (pt)
Inventor
Christopher B Wilkerson
Nicholas D Wade
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of BR0010620A publication Critical patent/BR0010620A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
BR0010620-8A 1999-05-18 2000-05-17 Método com proteção para substituição dos menos recentemente usados BR0010620A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/314,233 US6393525B1 (en) 1999-05-18 1999-05-18 Least recently used replacement method with protection
PCT/US2000/013569 WO2000070468A1 (en) 1999-05-18 2000-05-17 Least recently used replacement method with protection

Publications (1)

Publication Number Publication Date
BR0010620A true BR0010620A (pt) 2002-03-05

Family

ID=23219131

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0010620-8A BR0010620A (pt) 1999-05-18 2000-05-17 Método com proteção para substituição dos menos recentemente usados

Country Status (8)

Country Link
US (1) US6393525B1 (https=)
EP (1) EP1190327A1 (https=)
JP (1) JP4246922B2 (https=)
CN (1) CN100489817C (https=)
AU (1) AU5024600A (https=)
BR (1) BR0010620A (https=)
HK (1) HK1048176B (https=)
WO (1) WO2000070468A1 (https=)

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US6745291B1 (en) * 2000-08-08 2004-06-01 Unisys Corporation High speed LRU line replacement system for cache memories
US6576827B2 (en) * 2001-03-23 2003-06-10 Yamaha Corporation Music sound synthesis with waveform caching by prediction
US6918020B2 (en) * 2002-08-30 2005-07-12 Intel Corporation Cache management
US6973540B2 (en) * 2003-07-25 2005-12-06 Freescale Semiconductor, Inc. Method and apparatus for selecting cache ways available for replacement
JP4009304B2 (ja) * 2003-09-19 2007-11-14 松下電器産業株式会社 キャッシュメモリおよびキャッシュメモリ制御方法
CN1311367C (zh) * 2003-10-23 2007-04-18 英特尔公司 用于提高存取数据请求的处理速度的方法、装置和系统
EP1686485A4 (en) * 2003-11-18 2008-10-29 Matsushita Electric Industrial Co Ltd CACHE MEMORY AND CONTROL PROCEDURE THEREFOR
US7069389B2 (en) * 2003-11-26 2006-06-27 Microsoft Corporation Lazy flushing of translation lookaside buffers
US7146466B2 (en) * 2004-03-23 2006-12-05 International Business Machines System for balancing multiple memory buffer sizes and method therefor
KR100577384B1 (ko) * 2004-07-28 2006-05-10 삼성전자주식회사 페이지 정보를 이용한 페이지 대체 방법
US7321954B2 (en) * 2004-08-11 2008-01-22 International Business Machines Corporation Method for software controllable dynamically lockable cache line replacement system
US7734874B2 (en) * 2004-10-06 2010-06-08 Thomson Licensing Method and system for caching data using future access request information
US9146865B2 (en) 2005-01-26 2015-09-29 Lantiq Beteiligungs-GmbH & Co.KG Operating a dual-ported internal memory
US7380065B2 (en) * 2005-03-30 2008-05-27 International Business Machines Corporation Performance of a cache by detecting cache lines that have been reused
US20060282620A1 (en) * 2005-06-14 2006-12-14 Sujatha Kashyap Weighted LRU for associative caches
US7360043B1 (en) * 2005-08-17 2008-04-15 Sun Microsystems, Inc Method and apparatus for efficiently determining rank in an LRU list
US20070118695A1 (en) * 2005-11-18 2007-05-24 International Business Machines Corporation Decoupling storage controller cache read replacement from write retirement
US7543112B1 (en) 2006-06-20 2009-06-02 Sun Microsystems, Inc. Efficient on-chip instruction and data caching for chip multiprocessors
US7844778B2 (en) * 2006-07-11 2010-11-30 International Business Machines Corporation Intelligent cache replacement mechanism with varying and adaptive temporal residency requirements
US7908236B2 (en) * 2006-07-20 2011-03-15 International Business Machines Corporation Using multiple data structures to manage data in cache
US7793044B1 (en) * 2007-01-16 2010-09-07 Oracle America, Inc. Efficient caching of stores in scalable chip multi-threaded systems
US7457920B1 (en) * 2008-01-26 2008-11-25 International Business Machines Corporation Method and system for cache eviction
US8745334B2 (en) * 2009-06-17 2014-06-03 International Business Machines Corporation Sectored cache replacement algorithm for reducing memory writebacks
US8392658B2 (en) 2009-07-10 2013-03-05 Apple Inc. Cache implementing multiple replacement policies
AU2010201718B2 (en) 2010-04-29 2012-08-23 Canon Kabushiki Kaisha Method, system and apparatus for identifying a cache line
US20120124291A1 (en) * 2010-11-16 2012-05-17 International Business Machines Corporation Secondary Cache Memory With A Counter For Determining Whether to Replace Cached Data
CN102314397B (zh) * 2011-09-23 2014-03-19 浙江大学 缓存数据块的处理方法
CN102521049B (zh) * 2011-11-18 2013-07-10 清华大学 多核间内存调度方法
US9170955B2 (en) * 2012-11-27 2015-10-27 Intel Corporation Providing extended cache replacement state information
US9043554B2 (en) 2012-12-21 2015-05-26 Apple Inc. Cache policies for uncacheable memory requests
US9158702B2 (en) 2012-12-28 2015-10-13 Intel Corporation Apparatus and method for implementing a scratchpad memory using priority hint
US9223710B2 (en) 2013-03-16 2015-12-29 Intel Corporation Read-write partitioning of cache memory
CN106663060B (zh) * 2014-10-07 2019-11-19 谷歌有限责任公司 用于缓存线路去重的方法和系统
US20170168957A1 (en) * 2015-12-10 2017-06-15 Ati Technologies Ulc Aware Cache Replacement Policy
US10223278B2 (en) 2016-04-08 2019-03-05 Qualcomm Incorporated Selective bypassing of allocation in a cache
US20190303037A1 (en) * 2018-03-30 2019-10-03 Ca, Inc. Using sequential read intention to increase data buffer reuse

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0389151A3 (en) * 1989-03-22 1992-06-03 International Business Machines Corporation System and method for partitioned cache memory management
JPH0371347A (ja) * 1989-08-11 1991-03-27 Mitsubishi Electric Corp 参照頻度主導型記憶装置
JPH0492941A (ja) * 1990-08-09 1992-03-25 Digital Equip Corp <Dec> キャッシュメモリの順次参照管理方法および装置
JPH05189316A (ja) * 1992-01-10 1993-07-30 Fujitsu Ltd ディスクキャッシュ制御方法
US5434992A (en) * 1992-09-04 1995-07-18 International Business Machines Corporation Method and means for dynamically partitioning cache into a global and data type subcache hierarchy from a real time reference trace
US5778442A (en) * 1996-03-25 1998-07-07 Oracle Corporation Method and apparatus for buffering data in a computer system
US5974507A (en) * 1997-04-14 1999-10-26 International Business Machines Corporation Optimizing a cache eviction mechanism by selectively introducing different levels of randomness into a replacement algorithm
US6138213A (en) * 1997-06-27 2000-10-24 Advanced Micro Devices, Inc. Cache including a prefetch way for storing prefetch cache lines and configured to move a prefetched cache line to a non-prefetch way upon access to the prefetched cache line
US6105111A (en) * 1998-03-31 2000-08-15 Intel Corporation Method and apparatus for providing a cache management technique
JP3279253B2 (ja) * 1998-05-27 2002-04-30 日本電気株式会社 キャッシュページの管理方法およびキャッシュページの管理プログラムを記憶した媒体

Also Published As

Publication number Publication date
EP1190327A1 (en) 2002-03-27
AU5024600A (en) 2000-12-05
US6393525B1 (en) 2002-05-21
HK1048176B (zh) 2009-12-31
HK1048176A1 (zh) 2003-03-21
CN1361887A (zh) 2002-07-31
JP4246922B2 (ja) 2009-04-02
JP2002544624A (ja) 2002-12-24
WO2000070468A1 (en) 2000-11-23
CN100489817C (zh) 2009-05-20

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 11A ANUIDADE(S).

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2112 DE 28/06/2011.