BE852985A - Systeme de traitement des donnees avec adressage des mots, des multiplets et des bits - Google Patents

Systeme de traitement des donnees avec adressage des mots, des multiplets et des bits

Info

Publication number
BE852985A
BE852985A BE176203A BE176203A BE852985A BE 852985 A BE852985 A BE 852985A BE 176203 A BE176203 A BE 176203A BE 176203 A BE176203 A BE 176203A BE 852985 A BE852985 A BE 852985A
Authority
BE
Belgium
Prior art keywords
multiplets
bits
data processing
processing system
addressing words
Prior art date
Application number
BE176203A
Other languages
English (en)
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Publication of BE852985A publication Critical patent/BE852985A/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Executing Machine-Instructions (AREA)
BE176203A 1976-04-07 1977-03-29 Systeme de traitement des donnees avec adressage des mots, des multiplets et des bits BE852985A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/674,698 US4079451A (en) 1976-04-07 1976-04-07 Word, byte and bit indexed addressing in a data processing system

Publications (1)

Publication Number Publication Date
BE852985A true BE852985A (fr) 1977-07-18

Family

ID=24707588

Family Applications (1)

Application Number Title Priority Date Filing Date
BE176203A BE852985A (fr) 1976-04-07 1977-03-29 Systeme de traitement des donnees avec adressage des mots, des multiplets et des bits

Country Status (6)

Country Link
US (1) US4079451A (fr)
JP (1) JPS5812606B2 (fr)
BE (1) BE852985A (fr)
CA (1) CA1083725A (fr)
DE (1) DE2714805A1 (fr)
FR (1) FR2347722A1 (fr)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4093982A (en) * 1976-05-03 1978-06-06 International Business Machines Corporation Microprocessor system
JPS5448449A (en) * 1977-09-26 1979-04-17 Hitachi Ltd Virtual addressing sustem
JPS5464933A (en) * 1977-11-01 1979-05-25 Panafacom Ltd Main storage extension system
JPS6041769B2 (ja) * 1977-10-31 1985-09-18 日本電気株式会社 アドレス指定方式
US4447878A (en) * 1978-05-30 1984-05-08 Intel Corporation Apparatus and method for providing byte and word compatible information transfers
US4272828A (en) * 1979-01-03 1981-06-09 Honeywell Information Systems Inc. Arithmetic logic apparatus for a data processing system
US4374416A (en) * 1979-06-27 1983-02-15 Burroughs Corporation Linear sequencing microprocessor having word and byte handling
US4301505A (en) * 1979-06-27 1981-11-17 Burroughs Corporation Microprocessor having word and byte handling
US4323963A (en) * 1979-07-13 1982-04-06 Rca Corporation Hardware interpretive mode microprocessor
US4300208A (en) * 1979-11-30 1981-11-10 Control Data Corporation Controlling which of two addresses is used by a microcode memory
US4430711A (en) 1980-05-30 1984-02-07 Signetics Corporation Central processing unit
US4358826A (en) * 1980-06-30 1982-11-09 International Business Machines Corporation Apparatus for enabling byte or word addressing of storage organized on a word basis
US4418383A (en) * 1980-06-30 1983-11-29 International Business Machines Corporation Data flow component for processor and microprocessor systems
US4821184A (en) * 1981-05-22 1989-04-11 Data General Corporation Universal addressing system for a digital data processing system
US4445177A (en) * 1981-05-22 1984-04-24 Data General Corporation Digital data processing system utilizing a unique arithmetic logic unit for handling uniquely identifiable addresses for operands and instructions
US4480306A (en) * 1981-05-22 1984-10-30 Data General Corporation Digital data processing system using unique ALU register files and micro-instruction stacks
US4502111A (en) * 1981-05-29 1985-02-26 Harris Corporation Token generator
US4654781A (en) * 1981-10-02 1987-03-31 Raytheon Company Byte addressable memory for variable length instructions and data
US4507732A (en) * 1981-10-05 1985-03-26 Burroughs Corporation I/O subsystem using slow devices
US4507731A (en) * 1982-11-01 1985-03-26 Raytheon Company Bidirectional data byte aligner
US4719592A (en) * 1982-11-20 1988-01-12 International Computers Limited Sequence generator
JPS59174948A (ja) * 1983-03-25 1984-10-03 Toshiba Corp 情報処理装置
US6552730B1 (en) 1984-10-05 2003-04-22 Hitachi, Ltd. Method and apparatus for bit operational process
US5034900A (en) * 1984-10-05 1991-07-23 Hitachi, Ltd. Method and apparatus for bit operational process
US4942547A (en) * 1985-04-11 1990-07-17 Honeywell Bull, Inc. Multiprocessors on a single semiconductor chip
JPS62169205A (ja) * 1986-01-22 1987-07-25 Hitachi Ltd プログラマブルコントロ−ラ
US4956809A (en) * 1986-11-24 1990-09-11 Mark Williams Company Method for canonical ordering of binary data for portable operating systems
US5073969A (en) * 1988-08-01 1991-12-17 Intel Corporation Microprocessor bus interface unit which changes scheduled data transfer indications upon sensing change in enable signals before receiving ready signal
US5072372A (en) * 1989-03-03 1991-12-10 Sanders Associates Indirect literal expansion for computer instruction sets
US5179691A (en) * 1989-04-12 1993-01-12 Unisys Corporation N-byte stack-oriented CPU using a byte-selecting control for enhancing a dual-operation with an M-byte instruction word user program where M<N<2M
US6038584A (en) * 1989-11-17 2000-03-14 Texas Instruments Incorporated Synchronized MIMD multi-processing system and method of operation
GB9018990D0 (en) * 1990-08-31 1990-10-17 Ncr Co Register control for workstation interfacing means
JP2000010863A (ja) * 1998-06-24 2000-01-14 Sony Computer Entertainment Inc 情報処理装置および方法、並びに提供媒体
US6356994B1 (en) * 1998-07-09 2002-03-12 Bops, Incorporated Methods and apparatus for instruction addressing in indirect VLIW processors
US6360308B1 (en) * 1998-09-30 2002-03-19 Lsi Logic Corporation Buffer controller
JP4703762B1 (ja) 2009-12-22 2011-06-15 株式会社東芝 電子機器
US9208082B1 (en) * 2012-03-23 2015-12-08 David R. Cheriton Hardware-supported per-process metadata tags
CN112291567B (zh) * 2020-10-23 2023-03-21 湖南国科微电子股份有限公司 一种yuv数据存储方法、装置、设备及存储介质

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3161763A (en) * 1959-01-26 1964-12-15 Burroughs Corp Electronic digital computer with word field selection
GB1038710A (en) * 1964-04-04 1966-08-10 Ibm Data processing systems
US3343138A (en) * 1964-10-07 1967-09-19 Bell Telephone Labor Inc Data processor employing double indexing
US3581287A (en) * 1969-02-10 1971-05-25 Sanders Associates Inc Apparatus for altering computer memory by bit, byte or word
US3602896A (en) * 1969-06-30 1971-08-31 Ibm Random access memory with flexible data boundaries
UST843614I4 (fr) * 1969-07-22
BE752149A (nl) * 1970-06-18 1970-12-18 Bell Telephone Mfg Gegevens verwerkend systeem,
US3716838A (en) * 1970-08-24 1973-02-13 Honeywell Inf Systems Data processing system with selective character addressing of system store
FR122199A (fr) * 1973-12-17

Also Published As

Publication number Publication date
US4079451A (en) 1978-03-14
DE2714805A1 (de) 1977-10-20
CA1083725A (fr) 1980-08-12
FR2347722B1 (fr) 1984-03-30
JPS5812606B2 (ja) 1983-03-09
FR2347722A1 (fr) 1977-11-04
DE2714805C2 (fr) 1988-02-25
JPS52155029A (en) 1977-12-23

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: HONEYWELL INFORMATION SYSTEMS INC.

Effective date: 19900331