BE846854A - Demi-additionneur et additionneur utilisant des circuits de logique a mode de courant, - Google Patents

Demi-additionneur et additionneur utilisant des circuits de logique a mode de courant,

Info

Publication number
BE846854A
BE846854A BE171165A BE171165A BE846854A BE 846854 A BE846854 A BE 846854A BE 171165 A BE171165 A BE 171165A BE 171165 A BE171165 A BE 171165A BE 846854 A BE846854 A BE 846854A
Authority
BE
Belgium
Prior art keywords
additioner
logic circuits
current mode
mode logic
circuits
Prior art date
Application number
BE171165A
Other languages
English (en)
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE846854A publication Critical patent/BE846854A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/502—Half adders; Full adders consisting of two cascaded half adders
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48—Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802—Special implementations
    • G06F2207/4806—Cascode or current mode logic

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
BE171165A 1975-10-01 1976-10-01 Demi-additionneur et additionneur utilisant des circuits de logique a mode de courant, BE846854A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US61870975A 1975-10-01 1975-10-01

Publications (1)

Publication Number Publication Date
BE846854A true BE846854A (fr) 1977-01-31

Family

ID=24478821

Family Applications (1)

Application Number Title Priority Date Filing Date
BE171165A BE846854A (fr) 1975-10-01 1976-10-01 Demi-additionneur et additionneur utilisant des circuits de logique a mode de courant,

Country Status (7)

Country Link
JP (1) JPS5926056B2 (xx)
AU (1) AU1821276A (xx)
BE (1) BE846854A (xx)
CA (1) CA1076706A (xx)
DE (1) DE2643609A1 (xx)
FR (1) FR2326739A1 (xx)
GB (1) GB1521790A (xx)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4215418A (en) * 1978-06-30 1980-07-29 Trw Inc. Integrated digital multiplier circuit using current mode logic

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3519810A (en) * 1967-02-14 1970-07-07 Motorola Inc Logic element (full adder) using transistor tree-like configuration
US3978329A (en) * 1975-09-12 1976-08-31 Bell Telephone Laboratories, Incorporated One-bit full adder

Also Published As

Publication number Publication date
DE2643609A1 (de) 1977-04-14
JPS5244127A (en) 1977-04-06
DE2643609C2 (xx) 1988-09-22
AU1821276A (en) 1978-04-06
GB1521790A (en) 1978-08-16
FR2326739A1 (fr) 1977-04-29
CA1076706A (en) 1980-04-29
JPS5926056B2 (ja) 1984-06-23

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: HONEYWELL INFORMATION SYSTEMS INC.

Effective date: 19891031