BE845371A - Circuit de correction d'erreurs de synchronisation - Google Patents

Circuit de correction d'erreurs de synchronisation

Info

Publication number
BE845371A
BE845371A BE169952A BE169952A BE845371A BE 845371 A BE845371 A BE 845371A BE 169952 A BE169952 A BE 169952A BE 169952 A BE169952 A BE 169952A BE 845371 A BE845371 A BE 845371A
Authority
BE
Belgium
Prior art keywords
error correction
correction circuit
synchronization error
synchronization
circuit
Prior art date
Application number
BE169952A
Other languages
English (en)
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE845371A publication Critical patent/BE845371A/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Paper (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
  • Tests Of Electronic Circuits (AREA)
BE169952A 1975-08-25 1976-08-20 Circuit de correction d'erreurs de synchronisation BE845371A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/607,331 US4015083A (en) 1975-08-25 1975-08-25 Timing recovery circuit for digital data

Publications (1)

Publication Number Publication Date
BE845371A true BE845371A (fr) 1976-12-16

Family

ID=24431826

Family Applications (1)

Application Number Title Priority Date Filing Date
BE169952A BE845371A (fr) 1975-08-25 1976-08-20 Circuit de correction d'erreurs de synchronisation

Country Status (13)

Country Link
US (1) US4015083A (pt)
JP (1) JPS6024614B2 (pt)
AU (1) AU502771B2 (pt)
BE (1) BE845371A (pt)
BR (1) BR7605420A (pt)
CA (1) CA1051527A (pt)
DE (1) DE2637381C2 (pt)
ES (1) ES450960A1 (pt)
FR (1) FR2322490A1 (pt)
GB (1) GB1542082A (pt)
IT (1) IT1067402B (pt)
NL (1) NL7609235A (pt)
SE (1) SE423470B (pt)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52142408A (en) * 1976-05-21 1977-11-28 Nec Corp Clock extracting device in double two phase modulation system
DE2738279C3 (de) * 1977-08-25 1980-03-13 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren und Anordnung zum Ableiten eines Empfangstaktes
US4208724A (en) * 1977-10-17 1980-06-17 Sperry Corporation System and method for clocking data between a remote unit and a local unit
US4175213A (en) * 1978-11-06 1979-11-20 Bell Telephone Laboratories, Incorporated Regenerator having automatic gain control referenced to a data-pattern-dependent pulse stream
CA1150427A (en) * 1980-02-21 1983-07-19 Keith G. Wright Universal demultiplexer
JPS59122428U (ja) * 1983-02-07 1984-08-17 三菱電機株式会社 ころがり軸受の潤滑装置
US4547747A (en) * 1983-03-11 1985-10-15 General Signal Corporation Phase locked loop for high speed data
US4633464A (en) * 1983-08-08 1986-12-30 At&T Bell Laboratories Control signalling arrangement for a digital transmission system
US4586186A (en) * 1983-08-08 1986-04-29 At&T Bell Laboratories Maintenance response signalling arrangement for a digital transmission system
US4590602A (en) * 1983-08-18 1986-05-20 General Signal Wide range clock recovery circuit
US4587496A (en) * 1984-09-12 1986-05-06 General Signal Corporation Fast acquisition phase-lock loop
FR2605162B1 (fr) * 1986-10-08 1988-12-02 Cit Alcatel Procede et dispositif d'aide a l'acquisition d'une boucle a verrouillage de phase
US4720687A (en) * 1987-02-20 1988-01-19 Hewlett-Packard Company Frequency locked loop with constant loop gain and frequency difference detector therefor
US4773085A (en) * 1987-06-12 1988-09-20 Bell Communications Research, Inc. Phase and frequency detector circuits
US4902920A (en) * 1988-09-26 1990-02-20 General Signal Corporation Extended range phase detector
CA2045338C (en) * 1990-06-26 1995-07-04 Shousei Yoshida Clock recovery circuit with open-loop phase estimator and wideband phase tracking loop
US5388127A (en) * 1993-02-09 1995-02-07 Hitachi America, Ltd. Digital timing recovery circuit
FR2726713B1 (fr) * 1994-11-09 1997-01-24 Sgs Thomson Microelectronics Circuit de transmission de donnees en mode asynchrone a frequence libre de reception calee sur la frequence d'emission
JP3286885B2 (ja) * 1995-11-07 2002-05-27 三菱電機株式会社 タイミング再生手段及びダイバーシティ通信装置
US6020765A (en) * 1997-05-30 2000-02-01 Sun Microsystems, Inc. Frequency difference detector for use with an NRZ signal
US6366628B1 (en) * 1998-10-22 2002-04-02 National Science Council Method and circuit for sampling timing recovery
IT1308746B1 (it) * 1999-06-22 2002-01-10 Cselt Centro Studi Lab Telecom Dispositivo per la ricostruzione della temporizzazione di un canaledati trasportato su rete a pacchetto e relativo procedimento.
US6973150B1 (en) * 2001-04-24 2005-12-06 Rockwell Collins Cycle slip detection using low pass filtering
KR100547831B1 (ko) * 2003-06-18 2006-01-31 삼성전자주식회사 가변 데이터 전송률에 대응이 가능한 클럭 및 데이터 복원장치
TWI242929B (en) * 2004-12-01 2005-11-01 Ind Tech Res Inst Clock and data recovery apparatus and method thereof
US9847800B1 (en) * 2016-05-25 2017-12-19 Intel IP Corporation Direct compensation of IQ samples for undesired frequency deviation in phase locked loops
US10284332B2 (en) 2017-03-03 2019-05-07 Intel IP Corporation Spur cancelation using inverse spur injection

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2858425A (en) * 1952-11-08 1958-10-28 Lab For Electronics Inc Digital discriminator
US3768030A (en) * 1972-05-08 1973-10-23 Motorola Inc Automatic signal acquisition means for phase-lock loop with anti- sideband lock protection
US3766484A (en) * 1972-09-18 1973-10-16 Bell Telephone Labor Inc Detection of cycle slippage between two signals
US3863156A (en) * 1973-03-21 1975-01-28 Itt Frequency lock loop employing a gated frequency difference detector
US3867579A (en) * 1973-12-21 1975-02-18 Bell Telephone Labor Inc Synchronization apparatus for a time division switching system
US3878474A (en) * 1974-06-17 1975-04-15 Bell Telephone Labor Inc Phase locked loop

Also Published As

Publication number Publication date
GB1542082A (en) 1979-03-14
AU502771B2 (en) 1979-08-09
SE7609166L (sv) 1977-02-26
ES450960A1 (es) 1977-08-16
FR2322490B1 (pt) 1980-09-12
DE2637381A1 (de) 1977-03-10
DE2637381C2 (de) 1982-06-09
AU1702576A (en) 1978-02-23
BR7605420A (pt) 1977-08-16
US4015083A (en) 1977-03-29
JPS6024614B2 (ja) 1985-06-13
IT1067402B (it) 1985-03-16
JPS5226103A (en) 1977-02-26
NL7609235A (nl) 1977-03-01
FR2322490A1 (fr) 1977-03-25
CA1051527A (en) 1979-03-27
SE423470B (sv) 1982-05-03

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: WESTERN ELECTRIC CY INC.

Effective date: 19900831