BE844743A - PROCESS FOR THE REALIZATION, ON A SUPPORT, OF STRUCTURES WITH POSITIVE PHOTOSENSITIVE GLASS LAYERS - Google Patents

PROCESS FOR THE REALIZATION, ON A SUPPORT, OF STRUCTURES WITH POSITIVE PHOTOSENSITIVE GLASS LAYERS

Info

Publication number
BE844743A
BE844743A BE169435A BE169435A BE844743A BE 844743 A BE844743 A BE 844743A BE 169435 A BE169435 A BE 169435A BE 169435 A BE169435 A BE 169435A BE 844743 A BE844743 A BE 844743A
Authority
BE
Belgium
Prior art keywords
realization
structures
support
positive photosensitive
glass layers
Prior art date
Application number
BE169435A
Other languages
French (fr)
Inventor
J P Kehren
R Ousset
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE844743A publication Critical patent/BE844743A/en

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
BE169435A 1975-08-04 1976-07-30 PROCESS FOR THE REALIZATION, ON A SUPPORT, OF STRUCTURES WITH POSITIVE PHOTOSENSITIVE GLASS LAYERS BE844743A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2534795A DE2534795C3 (en) 1975-08-04 1975-08-04 Process for the production of structures from positive photoresist layers

Publications (1)

Publication Number Publication Date
BE844743A true BE844743A (en) 1976-11-16

Family

ID=5953192

Family Applications (1)

Application Number Title Priority Date Filing Date
BE169435A BE844743A (en) 1975-08-04 1976-07-30 PROCESS FOR THE REALIZATION, ON A SUPPORT, OF STRUCTURES WITH POSITIVE PHOTOSENSITIVE GLASS LAYERS

Country Status (7)

Country Link
JP (1) JPS5219531A (en)
BE (1) BE844743A (en)
DE (1) DE2534795C3 (en)
FR (1) FR2320584A1 (en)
GB (1) GB1548017A (en)
IT (1) IT1067163B (en)
NL (1) NL7608635A (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5329135B2 (en) * 1973-12-12 1978-08-18
AU544060B2 (en) * 1980-07-28 1985-05-16 Polychrome Corp. Accelerated diazo sensitised
DE3216268A1 (en) * 1982-04-30 1983-11-03 Siemens AG, 1000 Berlin und 8000 München Method of reducing line width variations in the production of patterns composed of photoresist layers on substrates provided for integrated semiconductor circuits by optical projection exposure
DE3310962A1 (en) * 1983-03-25 1984-09-27 Siemens AG, 1000 Berlin und 8000 München Method of reducing line-width variations in the production of photoresist patterns
JPS6155649A (en) * 1984-08-27 1986-03-20 Nippon Telegr & Teleph Corp <Ntt> Formation of pattern
CA1285418C (en) * 1985-07-18 1991-07-02 Robert A. Owens Pre-exposure method for increased sensitivity in high contrast resist development
FR2618230A1 (en) * 1987-07-17 1989-01-20 Thomson Semiconducteurs Photolithograpy process
KR930008139B1 (en) * 1990-08-30 1993-08-26 Samsung Electronics Co Ltd Method for preparation of pattern
KR950008384B1 (en) * 1992-12-10 1995-07-28 삼성전자주식회사 Method of forming pattern

Also Published As

Publication number Publication date
DE2534795A1 (en) 1977-02-10
JPS5219531A (en) 1977-02-14
FR2320584B1 (en) 1979-09-28
FR2320584A1 (en) 1977-03-04
DE2534795B2 (en) 1977-09-29
IT1067163B (en) 1985-03-12
DE2534795C3 (en) 1978-05-24
GB1548017A (en) 1979-07-04
NL7608635A (en) 1977-02-08

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