BE827240A - Dispositif pour multiplexer n trains numeriques plesiochrones - Google Patents

Dispositif pour multiplexer n trains numeriques plesiochrones

Info

Publication number
BE827240A
BE827240A BE1006554A BE1006554A BE827240A BE 827240 A BE827240 A BE 827240A BE 1006554 A BE1006554 A BE 1006554A BE 1006554 A BE1006554 A BE 1006554A BE 827240 A BE827240 A BE 827240A
Authority
BE
Belgium
Prior art keywords
multiplexing
plesiochronous digital
digital trains
trains
plesiochronous
Prior art date
Application number
BE1006554A
Other languages
English (en)
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE827240A publication Critical patent/BE827240A/xx

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/073—Bit stuffing, e.g. PDH

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
BE1006554A 1974-04-25 1975-03-27 Dispositif pour multiplexer n trains numeriques plesiochrones BE827240A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7414460A FR2269246B1 (nl) 1974-04-25 1974-04-25

Publications (1)

Publication Number Publication Date
BE827240A true BE827240A (fr) 1975-09-29

Family

ID=9138130

Family Applications (1)

Application Number Title Priority Date Filing Date
BE1006554A BE827240A (fr) 1974-04-25 1975-03-27 Dispositif pour multiplexer n trains numeriques plesiochrones

Country Status (13)

Country Link
US (1) US4002844A (nl)
JP (1) JPS50147606A (nl)
BE (1) BE827240A (nl)
BR (1) BR7502506A (nl)
DE (1) DE2518051A1 (nl)
DK (1) DK180875A (nl)
FR (1) FR2269246B1 (nl)
GB (1) GB1501283A (nl)
IE (1) IE41019B1 (nl)
IT (1) IT1037588B (nl)
LU (1) LU72300A1 (nl)
NL (1) NL7504985A (nl)
PL (1) PL108542B1 (nl)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4048440A (en) * 1976-11-08 1977-09-13 Bell Telephone Laboratories, Incorporated Asynchronous-to-synchronous data concentration system
FR2373198A1 (fr) * 1976-12-03 1978-06-30 Cit Alcatel Dispositif de multiplexage numerique de trains plesiochrones
JPH069346B2 (ja) * 1983-10-19 1994-02-02 富士通株式会社 同期伝送のための周波数変換方法
FR2564267B1 (fr) * 1984-05-11 1991-03-29 Telecommunications Sa Circuit de synchronisation dans un multiplexeur de signaux numeriques plesiochrones
US4688233A (en) * 1984-11-10 1987-08-18 Nec Corporation Digital data transmitting device for communication paths of restricted and unrestricted transmission characteristics
EG17964A (en) * 1985-09-13 1991-06-30 Siemens Ag A method of transmission for a digital signal
US4649536A (en) * 1985-09-23 1987-03-10 Motorola, Inc. Flexible multiplex system for time division multiplex
DE3769827D1 (de) * 1986-04-14 1991-06-13 Siemens Ag Demultiplexstufe eines digitalsignal-uebertragungsgeraetes.
CA1262173A (en) * 1986-05-29 1989-10-03 James Angus Mceachern Synchronization of asynchronous data signals
DE3920391A1 (de) * 1989-06-22 1991-01-10 Philips Patentverwaltung Schaltungsanordnung zur anpassung der bitraten zweier signale
US5359605A (en) * 1989-06-22 1994-10-25 U.S. Philips Corporation Circuit arrangement for adjusting the bit rates of two signals
DE3922897A1 (de) * 1989-07-12 1991-01-17 Philips Patentverwaltung Stopfentscheidungsschaltung fuer eine anordnung zur bitratenanpassung
DE4027967A1 (de) * 1990-09-04 1992-03-05 Philips Patentverwaltung Stopfentscheidungsschaltung fuer eine anordnung zur bitratenanpassung
DE4027968A1 (de) * 1990-09-04 1992-03-05 Philips Patentverwaltung Schaltungsanordnung zur bitratenanpassung zweier digitaler signale
JP2600509B2 (ja) * 1990-09-05 1997-04-16 富士通株式会社 ディジタル無線伝送方式
US7564875B2 (en) * 2003-11-11 2009-07-21 Intel Corporation Techniques to map and de-map signals
US9715914B1 (en) 2015-09-26 2017-07-25 Syntropy Systems, Llc Polyphase buffer for rate-conversion

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3093815A (en) * 1960-05-31 1963-06-11 Bell Telephone Labor Inc Pulse repeating system
US3569631A (en) * 1968-05-07 1971-03-09 Bell Telephone Labor Inc Pcm network synchronization
ES392199A1 (es) * 1970-12-24 1974-02-01 Sits Soc It Telecom Siemens Sistema de multiplexado y desmultiplexado para trnsmisio- nes.

Also Published As

Publication number Publication date
BR7502506A (pt) 1976-03-09
IE41019L (en) 1975-10-24
JPS50147606A (nl) 1975-11-26
DE2518051A1 (de) 1975-11-13
IE41019B1 (en) 1979-09-26
GB1501283A (en) 1978-02-15
FR2269246B1 (nl) 1976-12-17
IT1037588B (it) 1979-11-20
US4002844A (en) 1977-01-11
NL7504985A (nl) 1975-10-28
DK180875A (da) 1975-10-26
PL108542B1 (en) 1980-04-30
LU72300A1 (nl) 1976-03-17
FR2269246A1 (nl) 1975-11-21

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: CIE INDUSTRIELLE DES TELECOMMUICATIONS CIT ALCAT

Effective date: 19860331