BE815136A - Generateur servant a engendrer des signaux de sortie qui commandent des signaux de sortie de systemes redondants - Google Patents

Generateur servant a engendrer des signaux de sortie qui commandent des signaux de sortie de systemes redondants

Info

Publication number
BE815136A
BE815136A BE144405A BE144405A BE815136A BE 815136 A BE815136 A BE 815136A BE 144405 A BE144405 A BE 144405A BE 144405 A BE144405 A BE 144405A BE 815136 A BE815136 A BE 815136A
Authority
BE
Belgium
Prior art keywords
output signals
redundant systems
served
command output
generator
Prior art date
Application number
BE144405A
Other languages
English (en)
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE815136A publication Critical patent/BE815136A/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00392Modifications for increasing the reliability for protection by circuit redundancy

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Safety Devices In Control Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Hardware Redundancy (AREA)
  • Control Of Stepping Motors (AREA)
BE144405A 1973-11-14 1974-05-16 Generateur servant a engendrer des signaux de sortie qui commandent des signaux de sortie de systemes redondants BE815136A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH1599473A CH623669A5 (ja) 1973-11-14 1973-11-14

Publications (1)

Publication Number Publication Date
BE815136A true BE815136A (fr) 1974-09-16

Family

ID=4413638

Family Applications (1)

Application Number Title Priority Date Filing Date
BE144405A BE815136A (fr) 1973-11-14 1974-05-16 Generateur servant a engendrer des signaux de sortie qui commandent des signaux de sortie de systemes redondants

Country Status (11)

Country Link
US (1) US3961270A (ja)
JP (1) JPS5079680A (ja)
BE (1) BE815136A (ja)
BR (1) BR7409551A (ja)
CH (1) CH623669A5 (ja)
DE (1) DE2423276C3 (ja)
FR (1) FR2251052B1 (ja)
GB (1) GB1492806A (ja)
IT (1) IT1030775B (ja)
SE (1) SE396263B (ja)
ZA (1) ZA747098B (ja)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4019143A (en) * 1976-05-10 1977-04-19 Bell Telephone Laboratories, Incorporated Standby apparatus for clock signal generators
US4239982A (en) * 1978-06-14 1980-12-16 The Charles Stark Draper Laboratory, Inc. Fault-tolerant clock system
DE3023624C1 (de) * 1980-06-24 1981-10-01 Siemens AG, 1000 Berlin und 8000 München Taktgebareanordnung zum Erzeugen von Stauerimpulsen fuer ein redundantes Datenverarbeitungssystem
JPS6030898B2 (ja) * 1981-05-15 1985-07-19 テクトロニクス・インコ−ポレイテツド ロジツク・アナライザの入力装置
DE3225429A1 (de) * 1982-07-07 1984-01-12 Siemens AG, 1000 Berlin und 8000 München Taktgeberanordnung fuer ein redundantes steuersystem
NL8203921A (nl) * 1982-10-11 1984-05-01 Philips Nv Multipel redundant kloksysteem, bevattende een aantal onderling synchroniserende klokken, en klokschakeling voor gebruik in zo een kloksysteem.
US4733353A (en) * 1985-12-13 1988-03-22 General Electric Company Frame synchronization of multiply redundant computers
EP0306211A3 (en) * 1987-09-04 1990-09-26 Digital Equipment Corporation Synchronized twin computer system
US5185877A (en) * 1987-09-04 1993-02-09 Digital Equipment Corporation Protocol for transfer of DMA data
US4798976A (en) * 1987-11-13 1989-01-17 International Business Machines Corporation Logic redundancy circuit scheme
US4932040A (en) * 1987-12-07 1990-06-05 Bull Hn Information Systems Inc. Bidirectional control signalling bus interface apparatus for transmitting signals between two bus systems
US4977581A (en) * 1988-08-18 1990-12-11 Unisys Corporation Multiple frequency clock system
US5153881A (en) * 1989-08-01 1992-10-06 Digital Equipment Corporation Method of handling errors in software
US5068780A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones
US5251227A (en) * 1989-08-01 1993-10-05 Digital Equipment Corporation Targeted resets in a data processor including a trace memory to store transactions
US5163138A (en) * 1989-08-01 1992-11-10 Digital Equipment Corporation Protocol for read write transfers via switching logic by transmitting and retransmitting an address
EP0415545B1 (en) * 1989-08-01 1996-06-19 Digital Equipment Corporation Method of handling errors in software

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3025508A (en) * 1958-07-28 1962-03-13 Sperry Rand Corp Variation of high speed redundancy check generator
US3538344A (en) * 1968-05-03 1970-11-03 Itt Synchronized starting of redundant digital dividers
US3737674A (en) * 1970-02-05 1973-06-05 Lorain Prod Corp Majority logic system
DE2046140C2 (de) * 1970-09-18 1981-12-24 Bodenseewerk Gerätetechnik GmbH, 7770 Überlingen Schaltungsanordnung zur redundanten Signalübertragung bei einem Flugregler
DE2216591B1 (de) * 1972-04-06 1973-08-09 Siemens Ag, 1000 Berlin U. 8000 Muenchen Einrichtung zum Melden und Sperren einer simultanen Befehlsgabe mehrerer Steuerbefehlsgeber einer Ablaufsteuerung

Also Published As

Publication number Publication date
FR2251052A1 (ja) 1975-06-06
SE396263B (sv) 1977-09-12
DE2423276C3 (de) 1979-03-15
DE2423276B2 (de) 1976-08-26
IT1030775B (it) 1979-04-10
JPS5079680A (ja) 1975-06-28
US3961270A (en) 1976-06-01
BR7409551A (pt) 1976-05-25
SE7413900L (ja) 1975-05-15
CH623669A5 (ja) 1981-06-15
GB1492806A (en) 1977-11-23
FR2251052B1 (ja) 1979-05-25
ZA747098B (en) 1975-11-26
DE2423276A1 (de) 1975-05-22

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