BE763887A - Appareil servant a echanger des informations entre une memoire rapide et une memoire lente - Google Patents

Appareil servant a echanger des informations entre une memoire rapide et une memoire lente

Info

Publication number
BE763887A
BE763887A BE763887A BE763887A BE763887A BE 763887 A BE763887 A BE 763887A BE 763887 A BE763887 A BE 763887A BE 763887 A BE763887 A BE 763887A BE 763887 A BE763887 A BE 763887A
Authority
BE
Belgium
Prior art keywords
memory
exchanging information
slow
fast
fast memory
Prior art date
Application number
BE763887A
Other languages
English (en)
French (fr)
Inventor
R K Kronies
I C Hansen
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of BE763887A publication Critical patent/BE763887A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
    • G11B5/09—Digital recording

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
BE763887A 1970-03-19 1971-03-05 Appareil servant a echanger des informations entre une memoire rapide et une memoire lente BE763887A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US21040A US3609665A (en) 1970-03-19 1970-03-19 Apparatus for exchanging information between a high-speed memory and a low-speed memory

Publications (1)

Publication Number Publication Date
BE763887A true BE763887A (fr) 1971-08-02

Family

ID=21801985

Family Applications (1)

Application Number Title Priority Date Filing Date
BE763887A BE763887A (fr) 1970-03-19 1971-03-05 Appareil servant a echanger des informations entre une memoire rapide et une memoire lente

Country Status (7)

Country Link
US (1) US3609665A (xx)
JP (1) JPS4830168B2 (xx)
BE (1) BE763887A (xx)
DE (1) DE2111642C3 (xx)
FR (1) FR2084903A5 (xx)
GB (1) GB1310467A (xx)
NL (1) NL156262B (xx)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3806880A (en) * 1971-12-02 1974-04-23 North American Rockwell Multiplexing system for address decode logic
US3806888A (en) * 1972-12-04 1974-04-23 Ibm Hierarchial memory system
US3866180A (en) * 1973-04-02 1975-02-11 Amdahl Corp Having an instruction pipeline for concurrently processing a plurality of instructions
US3987417A (en) * 1974-10-07 1976-10-19 Brunson Raymond D Address memory system
US4125877A (en) * 1976-11-26 1978-11-14 Motorola, Inc. Dual port random access memory storage cell
DE3068498D1 (en) * 1979-05-09 1984-08-16 Int Computers Ltd Hierarchical data storage system
US4459662A (en) * 1980-09-29 1984-07-10 Texas Instruments Incorporated Microcomputer having ROM mass memory for downloading main RAM memory with microcomputer instructions
JPS60229111A (ja) * 1984-04-26 1985-11-14 Fanuc Ltd 数値制御方式
EP0167959B1 (en) * 1984-07-02 1992-05-06 Nec Corporation Computer vector register processing
JPS6261132A (ja) * 1985-09-12 1987-03-17 Fujitsu Ltd デ−タ転送命令制御方式
JPS62230169A (ja) * 1986-03-31 1987-10-08 Toshiba Corp ワイプ波形選択装置
US5717953A (en) * 1993-04-16 1998-02-10 Sony Corporation Information recording device and information transfer system using a high-speed buffer for recording in parallel on a low-speed recording medium
CA2121852A1 (en) * 1993-04-29 1994-10-30 Larry T. Jost Disk meshing and flexible storage mapping with enhanced flexible caching
US6370614B1 (en) 1999-01-26 2002-04-09 Motive Power, Inc. I/O cache with user configurable preload
US6463509B1 (en) 1999-01-26 2002-10-08 Motive Power, Inc. Preloading data in a cache memory according to user-specified preload criteria

Also Published As

Publication number Publication date
DE2111642C3 (de) 1974-05-22
NL7103580A (xx) 1971-09-21
DE2111642B2 (de) 1973-10-18
DE2111642A1 (de) 1971-09-30
US3609665A (en) 1971-09-28
FR2084903A5 (xx) 1971-12-17
GB1310467A (en) 1973-03-21
JPS463005A (xx) 1971-10-25
JPS4830168B2 (xx) 1973-09-18
NL156262B (nl) 1978-03-15

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: BURROUGHS CORP.

Effective date: 19880331