BE626251A - - Google Patents
Info
- Publication number
- BE626251A BE626251A BE626251DA BE626251A BE 626251 A BE626251 A BE 626251A BE 626251D A BE626251D A BE 626251DA BE 626251 A BE626251 A BE 626251A
- Authority
- BE
- Belgium
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
- Thyristors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16059161A | 1961-12-19 | 1961-12-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
BE626251A true BE626251A (da) |
Family
ID=22577517
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BE626251D BE626251A (da) | 1961-12-19 |
Country Status (5)
Country | Link |
---|---|
BE (1) | BE626251A (da) |
DE (1) | DE1439938A1 (da) |
FR (1) | FR1339897A (da) |
GB (1) | GB954534A (da) |
NL (1) | NL285921A (da) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1273698B (de) * | 1964-01-08 | 1968-07-25 | Telefunken Patent | Halbleiteranordnung |
CA941074A (en) * | 1964-04-16 | 1974-01-29 | Northern Electric Company Limited | Semiconductor devices with field electrodes |
US3446995A (en) * | 1964-05-27 | 1969-05-27 | Ibm | Semiconductor circuits,devices and methods of improving electrical characteristics of latter |
US3312871A (en) * | 1964-12-23 | 1967-04-04 | Ibm | Interconnection arrangement for integrated circuits |
US3600648A (en) * | 1965-04-21 | 1971-08-17 | Sylvania Electric Prod | Semiconductor electrical translating device |
DE1514562B2 (de) * | 1965-09-07 | 1972-12-07 | Semikron Gesellschaft fur Gleich richterbau und Elektronik mbH, 8500 Nurn berg | Anordnung zur herstellung eines halbleiter-bauelementes |
US3651384A (en) * | 1971-03-08 | 1972-03-21 | Warren P Waters | Planar schottky barrier |
-
0
- BE BE626251D patent/BE626251A/xx unknown
- NL NL285921D patent/NL285921A/xx unknown
-
1962
- 1962-05-03 GB GB16944/62A patent/GB954534A/en not_active Expired
- 1962-11-21 FR FR916187A patent/FR1339897A/fr not_active Expired
- 1962-12-13 DE DE19621439938 patent/DE1439938A1/de active Pending
Also Published As
Publication number | Publication date |
---|---|
FR1339897A (fr) | 1963-10-11 |
DE1439938A1 (de) | 1968-12-19 |
GB954534A (en) | 1964-04-08 |
NL285921A (da) |