BE621451A - - Google Patents

Info

Publication number
BE621451A
BE621451A BE621451DA BE621451A BE 621451 A BE621451 A BE 621451A BE 621451D A BE621451D A BE 621451DA BE 621451 A BE621451 A BE 621451A
Authority
BE
Belgium
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication of BE621451A publication Critical patent/BE621451A/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04Coating on selected surface areas, e.g. using masks
    • C23C14/042Coating on selected surface areas, e.g. using masks using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02269Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by thermal evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • H01L21/31608Deposition of SiO2
    • H01L21/31612Deposition of SiO2 on a silicon body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/106Masks, special
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/169Vacuum deposition, e.g. including molecular beam epitaxy

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
BE621451D 1961-08-16 BE621451A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US131771A US3144366A (en) 1961-08-16 1961-08-16 Method of fabricating a plurality of pn junctions in a semiconductor body

Publications (1)

Publication Number Publication Date
BE621451A true BE621451A (ja)

Family

ID=22450959

Family Applications (1)

Application Number Title Priority Date Filing Date
BE621451D BE621451A (ja) 1961-08-16

Country Status (6)

Country Link
US (1) US3144366A (ja)
BE (1) BE621451A (ja)
CH (1) CH402194A (ja)
DE (1) DE1266609B (ja)
GB (1) GB992671A (ja)
NL (1) NL281568A (ja)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3377215A (en) * 1961-09-29 1968-04-09 Texas Instruments Inc Diode array
GB1052379A (ja) * 1963-03-28 1900-01-01
US3291640A (en) * 1963-05-27 1966-12-13 Chemclean Corp Ultrasonic cleaning process
DE1290925B (de) * 1963-06-10 1969-03-20 Philips Nv Verfahren zum Abscheiden von Silicium auf einem Halbleiterkoerper
NL136562C (ja) * 1963-10-24
US3352726A (en) * 1964-04-13 1967-11-14 Philco Ford Corp Method of fabricating planar semiconductor devices
US3477886A (en) * 1964-12-07 1969-11-11 Motorola Inc Controlled diffusions in semiconductive materials
US3372071A (en) * 1965-06-30 1968-03-05 Texas Instruments Inc Method of forming a small area junction semiconductor
US3447238A (en) * 1965-08-09 1969-06-03 Raytheon Co Method of making a field effect transistor by diffusion,coating with an oxide and placing a metal layer on the oxide
US3391035A (en) * 1965-08-20 1968-07-02 Westinghouse Electric Corp Method of making p-nu-junction devices by diffusion
US3347720A (en) * 1965-10-21 1967-10-17 Bendix Corp Method of forming a semiconductor by masking and diffusion
US3383251A (en) * 1965-12-10 1968-05-14 Rca Corp Method for forming of semiconductor devices by masking and diffusion
US3468729A (en) * 1966-03-21 1969-09-23 Westinghouse Electric Corp Method of making a semiconductor by oxidizing and simultaneous diffusion of impurities having different rates of diffusivity
GB1130666A (en) * 1966-09-30 1968-10-16 Nippon Electric Co A semiconductor device
US3419746A (en) * 1967-05-25 1968-12-31 Bell Telephone Labor Inc Light sensitive storage device including diode array
US3442012A (en) * 1967-08-03 1969-05-06 Teledyne Inc Method of forming a flip-chip integrated circuit
US3772102A (en) * 1969-10-27 1973-11-13 Gen Electric Method of transferring a desired pattern in silicon to a substrate layer
FR2252638B1 (ja) * 1973-11-23 1978-08-04 Commissariat Energie Atomique
DE2415290A1 (de) * 1974-03-29 1975-10-09 Licentia Gmbh Maske zur bearbeitung einer halbleiteranordnung
US6087263A (en) 1998-01-29 2000-07-11 Micron Technology, Inc. Methods of forming integrated circuitry and integrated circuitry structures

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE505362A (ja) * 1950-09-06
US2796562A (en) * 1952-06-02 1957-06-18 Rca Corp Semiconductive device and method of fabricating same
DE1047911B (de) * 1955-06-07 1958-12-31 Dr Erwin Daniels Verfahren zur Herstellung temperaturempfindlicher Hochohmwiderstaende geringer Waermetraegheit, insbesondere zur Strahlungsmessung
US2995461A (en) * 1956-04-02 1961-08-08 Libbey Owens Ford Glass Co Protective coatings
DE1097039B (de) * 1958-07-02 1961-01-12 Licentia Gmbh Verfahren zur Herstellung von elektrisch unsymmetrisch leitenden Halbleiteranordnungen
US2961354A (en) * 1958-10-28 1960-11-22 Bell Telephone Labor Inc Surface treatment of semiconductive devices
NL122784C (ja) * 1959-04-15

Also Published As

Publication number Publication date
GB992671A (en) 1965-05-19
CH402194A (de) 1965-11-15
DE1266609B (de) 1968-04-18
NL281568A (ja)
US3144366A (en) 1964-08-11

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