AU7815394A - A buffering method and a buffer - Google Patents

A buffering method and a buffer

Info

Publication number
AU7815394A
AU7815394A AU78153/94A AU7815394A AU7815394A AU 7815394 A AU7815394 A AU 7815394A AU 78153/94 A AU78153/94 A AU 78153/94A AU 7815394 A AU7815394 A AU 7815394A AU 7815394 A AU7815394 A AU 7815394A
Authority
AU
Australia
Prior art keywords
buffer
buffering method
buffering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU78153/94A
Inventor
Toni Oksanen
Jari Patana
Esa Viitanen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Publication of AU7815394A publication Critical patent/AU7815394A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/16—Multiplexed systems, i.e. using two or more similar devices which are alternately accessed for enqueue and dequeue operations, e.g. ping-pong buffers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
AU78153/94A 1993-10-14 1994-10-13 A buffering method and a buffer Abandoned AU7815394A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FI934544A FI94697C (en) 1993-10-14 1993-10-14 Method for realizing buffering in a digital data communication system as well as a buffer
FI934544 1993-10-14
PCT/FI1994/000462 WO1995010897A1 (en) 1993-10-14 1994-10-13 A buffering method and a buffer

Publications (1)

Publication Number Publication Date
AU7815394A true AU7815394A (en) 1995-05-04

Family

ID=8538782

Family Applications (1)

Application Number Title Priority Date Filing Date
AU78153/94A Abandoned AU7815394A (en) 1993-10-14 1994-10-13 A buffering method and a buffer

Country Status (5)

Country Link
AU (1) AU7815394A (en)
DE (2) DE4497707B4 (en)
FI (1) FI94697C (en)
GB (1) GB2297464B (en)
WO (1) WO1995010897A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE515563C2 (en) * 1995-01-11 2001-08-27 Ericsson Telefon Ab L M data transmission system
DE19529966A1 (en) * 1995-08-14 1997-02-20 Thomson Brandt Gmbh Method and circuit arrangement for resynchronizing a memory management
FR2746987A1 (en) * 1996-03-29 1997-10-03 Philips Electronics Nv ANALOGUE / DIGITAL CONVERTER WITH HIGH SAMPLING FREQUENCY

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4710920A (en) * 1986-06-19 1987-12-01 General Datacomm, Inc. Bit interleaved multiplexer system providing byte synchronization for communicating apparatuses
FI94812C (en) * 1993-05-18 1995-10-25 Nokia Telecommunications Oy Method and apparatus for effecting equalization decisions at a node in a synchronous digital data communication system

Also Published As

Publication number Publication date
FI94697B (en) 1995-06-30
FI934544A0 (en) 1993-10-14
GB2297464B (en) 1997-12-10
DE4497707B4 (en) 2004-12-23
DE4497707T1 (en) 1996-10-31
FI94697C (en) 1995-10-10
WO1995010897A1 (en) 1995-04-20
GB9607820D0 (en) 1996-06-19
FI934544A (en) 1995-04-15
GB2297464A (en) 1996-07-31

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