AU6301586A - Coder for multi-dimensional difference pcm - Google Patents

Coder for multi-dimensional difference pcm

Info

Publication number
AU6301586A
AU6301586A AU63015/86A AU6301586A AU6301586A AU 6301586 A AU6301586 A AU 6301586A AU 63015/86 A AU63015/86 A AU 63015/86A AU 6301586 A AU6301586 A AU 6301586A AU 6301586 A AU6301586 A AU 6301586A
Authority
AU
Australia
Prior art keywords
output
adder
input
subtracting unit
fed back
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU63015/86A
Other versions
AU567015B2 (en
Inventor
Hans-Joachim Grallert
Hans Jurgen Mattausch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of AU6301586A publication Critical patent/AU6301586A/en
Application granted granted Critical
Publication of AU567015B2 publication Critical patent/AU567015B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/593—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial prediction techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3044—Conversion to or from differential modulation with several bits only, i.e. the difference between successive samples being coded by more than one bit, e.g. differential pulse code modulation [DPCM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

1. Multi-dimensional DPCM coder with a high processing speed, characterised by : a) A quantisation device (QE) which is preceded by a series circuit of a first, second and third subtracting unit (SU1, SU2, SU3), the first subtracting unit (SU1) being supplied with digitised samples (si) from the input (1) of the coder, b) A first computing loop which is fed back from the output (3) of the quantisation device (QE), at which quantised DPCM values (DELTA si, q) are output, via a first multiplier (M1) which multiplies by a constant prediction factor (a), to the subtraction input (-) of the third subtracting unit (SU3) which directly precedes the quantisation device (QE), c) An inner computing loop which exhibits a first adder (AD1), which is connected to the output (3) of the quantisation device and the output of which is fed back via the series circuit of a second register (R2) and a second multiplier (M2) and via a second adder (AD2) to the second input of the first adder (AD1), d) A second computing loop which is fed back from the output (3) of the quantisation device (QE) via the first adder (AD1), the second register (R2) and via two multipliers (M2, M3), which in each case multiply by the prediction factor (a), to the subtraction input (-) of the second substracting unit (SU2) preceding the third subtracting unit (SU3), and e) A third computing loop which is fed back via the first adder (AD1) and a line predictor (PRL) which delivers at its output (6) an additional estimated value (szi) to the subtraction input (-) of the first subtracting unit (SU1), the output (6) of the line predictor (PRL) also being connected via a register (Rz+1 ) to the second input of the second adder (AD2) in the inner computing loop.
AU63015/86A 1985-09-23 1986-09-22 Coder for multi-dimensional difference pcm Ceased AU567015B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3533868 1985-09-23
DE3533868 1985-09-23

Publications (2)

Publication Number Publication Date
AU6301586A true AU6301586A (en) 1987-06-11
AU567015B2 AU567015B2 (en) 1987-11-05

Family

ID=6281689

Family Applications (1)

Application Number Title Priority Date Filing Date
AU63015/86A Ceased AU567015B2 (en) 1985-09-23 1986-09-22 Coder for multi-dimensional difference pcm

Country Status (5)

Country Link
EP (1) EP0218918B1 (en)
JP (1) JPS6272230A (en)
AT (1) ATE48354T1 (en)
AU (1) AU567015B2 (en)
DE (1) DE3667232D1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1775097A1 (en) * 2005-10-17 2007-04-18 REMAK Maschinenbau GmbH Device for the temperature control of moulds, such as of injection moulding machines

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1085044A (en) * 1975-04-03 1980-09-02 Yukihiko Iijima Composite feedback predictive code communication system for a color tv signal including a carrier chrominance signal
WO1980000207A1 (en) * 1978-06-27 1980-02-07 Indep Broadcasting Authority Predictive differential pulse-code modulation apparatus
DE3232516A1 (en) * 1982-09-01 1984-03-01 Siemens AG, 1000 Berlin und 8000 München FAST DPCM ENCODER
DE3333404A1 (en) * 1983-09-15 1985-04-04 Siemens AG, 1000 Berlin und 8000 München METHOD AND CIRCUIT ARRANGEMENT FOR IMPROVING THE IMAGE QUALITY BY ACTIVITY CONTROLLED DPCM CODING
EP0173983B1 (en) * 1984-08-30 1992-12-30 Fujitsu Limited Differential coding circuit
US4658239A (en) * 1984-09-14 1987-04-14 Siemens Aktiengesellschaft Differential pulse code modulation coder

Also Published As

Publication number Publication date
ATE48354T1 (en) 1989-12-15
EP0218918B1 (en) 1989-11-29
JPS6272230A (en) 1987-04-02
EP0218918A1 (en) 1987-04-22
AU567015B2 (en) 1987-11-05
JPH0156579B2 (en) 1989-11-30
DE3667232D1 (en) 1990-01-04

Similar Documents

Publication Publication Date Title
CA2179979A1 (en) Method and apparatus for multiuser-interference reduction
DE3268071D1 (en) Digital processing circuit having a multiplication function
MX9801571A (en) An apparatus for performing multiply-add operations on packed data.
EP0380100A3 (en) Multiplier
EP0280574A3 (en) Method and apparatus for predictive coding
CA1214279A (en) Digital dpcm-coders of high processing speed
AU567015B2 (en) Coder for multi-dimensional difference pcm
SE8207325L (en) Digital Filter
AU566781B2 (en) Coder for multi-dimensional difference pcm
JPS57199044A (en) Multiplying device
AU558449B2 (en) A dpcm-coder
KR880004463A (en) Sample data tone control system
MY116850A (en) Multichannel receiver using analysis by synthesis
JPS5642869A (en) Motion picture/still picture separator
JPS6417515A (en) Phase comparator
JPS56149823A (en) Band pass filter
JPS6473808A (en) Sine wave oscillator
JPS5775745A (en) Fixing method and device of edge material in panel forming unit
GB8614047D0 (en) Differential pulse code modulation
JPS56103738A (en) Multiplication and division device for pcm signal
JPS5728435A (en) Method and apparatus for signal reception and demodulation
JPS54158832A (en) Multiplier
CA2051583A1 (en) Interpolator Increasing the Output Word Rate of a Digital Signal
JPS5516573A (en) Cyclic variable filter
JPS6476162A (en) Arithmetic circuit for sum of products