AU624385B2 - Programmable test system - Google Patents

Programmable test system Download PDF

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Publication number
AU624385B2
AU624385B2 AU36120/89A AU3612089A AU624385B2 AU 624385 B2 AU624385 B2 AU 624385B2 AU 36120/89 A AU36120/89 A AU 36120/89A AU 3612089 A AU3612089 A AU 3612089A AU 624385 B2 AU624385 B2 AU 624385B2
Authority
AU
Australia
Prior art keywords
test
bus
product
programmable
dedicated interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
AU36120/89A
Other versions
AU3612089A (en
Inventor
Kevin Anthony Crowe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Services Ltd
Original Assignee
Alcatel Australia Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Australia Ltd filed Critical Alcatel Australia Ltd
Publication of AU3612089A publication Critical patent/AU3612089A/en
Assigned to ALCATEL AUSTRALIA LIMITED reassignment ALCATEL AUSTRALIA LIMITED Amend patent request/document other than specification (104) Assignors: STANDARD TELEPHONES AND CABLES PTY. LIMITED
Application granted granted Critical
Publication of AU624385B2 publication Critical patent/AU624385B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2834Automated test systems [ATE]; using microprocessors or computers

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Description

b COMMONWEALTH OF AUSTRALIA PATENTS ACT 1952-1969 COMPLETE SPECIFICATION FOR THE INVENTION ENTITLED "PROGRAMMABLE TEST SYSTEM" The following statement is a full description of this invention, including the best method of performing it known to us:-
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*t 2 This invention relates to a programmable test arrangement for testing clectronic products, in particular, though not exclusively, telephone apparatus and components.
Hitherto, when a new electronic product was developed and a series of functional tests needed to be applied, it was necessary to design and assemble a complete test I 5 arrangement for that new product. If the product was substantially modified or anji other product developed a complete new test arrangement had to be designed and j assembled. Typically the design and assembly of the test arrangement took about six i months.
It is an object of the present invention to provide a programmable test system in which it is only necessary to design and assemble a dedicated interface arrangement to interface the new device to be tested with a permanently set up test system.
According to the invention there is provided a programmable test system for :i applying a series of functional tests to an electronic product, said system comprising a plurality of demountable electronic-functional test circuit means controllably cou- 15 pled via bus means to a processor means and arranged to selectively apply functional tests to an electronic product via a demountable product dedicated interface means interposed between said test circuits and said product.
In order that the invention can be readily carried into effect an embodiment thereof will now be described in relation to the block diagram shown in the drawing.
.i 20 Referring to the drawing the system comprises an IEEE P1000 standard bus S" (STE) to which is coupled an EPROM Library consisting of a collection of IC's which store software for controlling the operation of the microprocessor; a 32K RAM which S'"i stores software instructions as well as the results of various tests in the form of data; A display means for displaying a menu of tests and to display results of tests; A printer for printing out test results and for obtaining hard copies thereof; A functional generator which is capable of producing virtually any shaped waveform from 1 Hz to 5 kHz. The shape of the waveform is stored in an EPROM or RAM in the generator and selected by the microprocessor; An analog measurement means which converts analog voltage signals into digital form to be manipulated by the microprocessor; A programmable Band Pass Filter (BPF) which is used to reject unwanted signals during tests on signals of a specific frequency such as, for example, testing the frequency components of Dual Tone Multifrequency (DTMF) generators;
-I.
i i A counter which is used to measure time and the width of a pulse such as, for example, dial pulse ratio tests. The counter is also utilised in frequency measurements; I/0 means which is an Electro-mechanical interface for operating, for example, solenoids; also associated with the I/O means is a start switch, a jig control and a fixed power supply.
A programmable Power Supply which is used to select various voltages required by the device under test.
Disposed between the above constituents and the interface is a 16 line analog bus for routing signals between boards.
The interface is a circuit board specially designed for the particular device under test. It includes protective means to protect the various constitutcnt components coupled to the analog bus.
The system may be coupled to a remote computer to store test data, or program 15 instructions.
To control external test instruments such as, for example, a frequency analyzer the system may be coupled to such an instrument via a GPIB controller interposed between the STE bus and the instrument.
Finally the system can perform as a slave to an external computer such as for 20 example an ITT Xtra or HP9816.
The test system is housed in a case 450mm wide x 267mm high x 296mm deep.
The case houses and supports demountable circuit cards of the various components of the system interconnected via a back-plane.
While the present invention has been described with regard to many particulars, it is to be understood that equivalents may be readily substituted without departing from the scope of the invention.

Claims (8)

1. A programmable test system for applying a series of functional tests to an electronic product, said system comprising a plurality of demountable electronic- functional test circuit means controllably coupled via bus means to a processor means and arranged to selectively apply functional tests to an electronic product via a de- mountable product dedicated interface means interposed between said test circuits and said product.
2. A system as claimed in claim I, wherein an analog bus means is interposed between said test circuit means and said dedicated interface means.
3. A system as claimed in claim I or 2, wherein said processor means includes memory means for storing test instructions and test data.
4. A system as claimed in any one of the preceding claims, wherein said tst data is stored in external computer means.
5. A system as claimed in any one of the preceding claims, wherein at least one 15 external test instrument is coupled to said bus means via a bus controller means.
6. A system as claimed in any one of the preceding claims, wherein at least each said test circuit means and the dedicated interface means are in the form of de- mountable circuit cards demountably interconnected via a back-plane printed circuit board enclosed in an enclosure means. 20
7. A programmable test system, substantially as herein described with reference to the figure of the drawing.
8. A programmable test system, wherein said electronic product is a telephone subset. o* DATED THIS TWENTY-FIRST DAY OF FEBRUARY, 1992 ALCATEL AUSTRALIA LIMITED i'i
AU36120/89A 1988-06-21 1989-06-08 Programmable test system Expired - Fee Related AU624385B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AUPI8906 1988-06-21
AUPI890688 1988-06-21

Publications (2)

Publication Number Publication Date
AU3612089A AU3612089A (en) 1990-01-04
AU624385B2 true AU624385B2 (en) 1992-06-11

Family

ID=3773173

Family Applications (1)

Application Number Title Priority Date Filing Date
AU36120/89A Expired - Fee Related AU624385B2 (en) 1988-06-21 1989-06-08 Programmable test system

Country Status (1)

Country Link
AU (1) AU624385B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0157028A1 (en) * 1984-04-05 1985-10-09 Grumman Aerospace Corporation Programmable tester

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0157028A1 (en) * 1984-04-05 1985-10-09 Grumman Aerospace Corporation Programmable tester

Also Published As

Publication number Publication date
AU3612089A (en) 1990-01-04

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