AU4521489A

AU4521489A - A telephone subset arrangement

Info

Publication number: AU4521489A
Application number: AU45214/89A
Authority: AU
Inventors: Ronald Christopher Shaw Fox
Original assignee: Standard Telephone and Cables Pty Ltd; Standard Telephone and Cables PLC
Current assignee: Nokia Services Ltd
Priority date: 1988-12-23
Filing date: 1989-11-17
Publication date: 1990-08-01
Anticipated expiration: 2009-11-17
Also published as: AU630900B2

Description

A Telephone Subset Arrangement

Technical Field

This invention relates to telephone subsets and in particular to low voltage telephone subsets incorporation a dialler chip and an electronic line switch.

The electronic line switch fulfils a number of functions including the hook-switch function, that is, the line switch acts as a hook-switch when a hook-switch control signal is selectively applied to the line switch, a hook-switch control signal being generated when the user brings the subset into the off-hook mode. This control signal may be provided by a ten num¬ ber repetory tone/pulse dialler chip or a microprocessor.

In a subset provided with a dialler chip and a conventional mechanical hook-switch, the dialler chip is provided with its operating power from current derived from the exchange battery and drawn over the exchange line through the hook-switch. As soon as the subset is brought into the off- hook mode the hook-switch contacts operate and adequate operating voltage is extended to the dialler chip which is then able to function.

In the case of a subset provided with an electronic line switch, how¬ ever, when such a subset is intially connected to the exchange line, or re¬ connected after subsequently being un-plugged, the dialler chip is without power because its power source is cut off by the line switch which it con¬ trols. Consequently the dialler chip cannot function and the line switch cannot be signalled. Background Art

A known method by which the dialler chip of such a subset is provided with power is described in the specification of PCT/AU88/00046. This spec¬ ification disclosed an arrangement wherein a storage capacitor provides a current source for the dialler chip. The arrangement is such that ini¬ tially, with the capacitor discharged, upon connexion of the subset's line terminals to the exchange line, current flows via a circuit to cause a first transistor to switch on thereby rendering the subset's electronic line switch conducting. The capacitor is charged via the operated line switch until the voltage level across the capacitor reaches the minimum op¬ eration voltage of the dialler chip. A control circuit then switches off the first transistor and hence the line switch.

This known arrangement, however, is not satisfactory for providing power to the dialler chip in a low voltage phone,* and particularly low voltage phones in parallel, because of the low voltage at the phone line terminals.

Another known arrangement or providing power to the dialler chip is a bleed circuit around the line switch to bleed sufficient current fran the exchange line in the on-hook mode. With low voltage subsets, particularly parallel low voltage subsets, the bleed current required to power the dialler chips would exceed the allowable on-hook current allowed by some telecommunication authorities.

A solution to the problem of providing power to the dialler chip in the on-hook mode is to provide the power with a dry cell. An undesirable feature of this solution, however, is the necessity to replace the cell when its capacity falls due to discharge. If the discharge is kept to a minimum, the cell life will be greatly extended.

It is therefore an object of the present invention to provide a dry cell switching arrangement for disconnecting a dry cell providing power to the dialler chip of a subset when the subset is in the off-hook mode. Summary of the Invention

The inventive concept of the present invention is to provide a switch¬ ing arrangement to disconnect a dry cell providing power to the subset's dialler chip during the "of -hook" mode, the arrangement using minimal power.

According to the invention there is provided a telephone subset cir¬ cuit arrangement comprising first and second line terminal means for re- spectively connecting to conductors of an exchange line, a transmission circuit means connected between said line terminal means, a line switch means whose switching element Is formed by a conductive path of a first controllable semi-conductor switch means having a control element coupled to a first output of a control means associated with the transmission cir¬ cuit means, said switching element being serially in the subset circuit's loop current circuit, said control means having power terminal means for applying energizing power to enable said control means, wherein energy from a battery means associated with said subset is connected to said power ter¬ minal means via a conductive path of a second controllable semiconductor switch means when the subset is in the on-hook mode, and wherein when the subset is in the off-hook mode, hook-switch means render said second con¬ trollable semiconductor switch means non-conducting thereby disconnecting said battery means from said power terminal means, and rendering a third controllable semiconductor switch means conducting, said third controllable semiconductor means applying signal means to hook-switch signal input means of said control means, said control means thereupon producing a line switch signal to render said line switch's semiconductor switching element con¬ ducting, said power terminal means being thereby coupled via the trans¬ mission circuit means to said first and second line terminal means.

In order that the invention can be readily understood, an embodiment thereof will now be described in relation to the figure of the drawing.

Referring to the drawing there is shown a schematic circuit of part of a low voltage telephone' subset. The circuit comprises a ten number repetory tone/pulse dialler chip 1 having a dial pulse output DP, a power terminal VDD, a comπon voltage rail terminal VSS and a hook switch input HS; an electronic line switch 2 serially connected between the LI line terminal (not shown) and the transmission circuit (TX), and the line switch control transistor TR6; a lithium 3 dry cell Bl; a hook switch signal contact HS; a storage capacitor Cl connected across VDD and USS; the pos- - - itive terminal of battery Bl is connected to the emitter element of tran¬ sistor TRl whose base element is connected to the coπmon voltage rail via three serially connected resistors Rl, R2 and R3; the collector element of a P P transistor TRl is connected to the base element of an NPN transistor TR2 whose emitter is connected to VDD of dialler chip 1; the junction of resistor R2 and R3 is connected to the base element of an NPN transistor TR3 whose collector is connected to the base element of a PNP transistor TR4 via resistor R5; the collector of PNP transistor TR4 Is connected to the base element of an NPN transistor TR5 via resistor R6; the collector of transistor TR5 is connected to HS of dialler chip 1; signal contact HS Is connected across the positive terminal of battery Bl and the junction of resistors Rl and R2; VSS is coupled to the L2 terminal (not shown) of the subset.

In operation, in the on-hook mode, the hook switch signal contacts HS are open and transistor TRl is turned on by current provided by battery Bl through its emitter/base junction and resistors Rl, R2, R3. Transistor TR2 is turned on by current from battery Bl via the emitter/collector junction of transistor TR2. The collector/emitter junction of transistor TR2 con¬ nects the positive terminal of battery Bl to the VDD terminal of dialler chip 1 to maintain the chip's memory. In this condition the dialler chip typically draws 1.0 UA. Storage capacitor Cl is quickly charged by current drawn from battery Bl via the collector/emitter junction of transistor TR2. The charge on Cl maintains the chip's memory during impulse dialling.

When the subset Is placed in the off-hook mode, signal contacts HS close and effectively shunt transistor TRl and resistor Rl. Transistor TRl and TR2 turn off. The current through resistors R2 and R3 increases caus¬ ing transistor TR3 to now turn on, which in turn causes transistors TR4 and TR5 to turn on. When transistor TR5 turns on terminal HS of dialler chip 1 is rendered LOW, this causes terminal DP to go HIGH. Terminal DP is con¬ nected to the base element of line switch control transistor TR6 which is turned on by the changed condition on terminal DP. Transistor TR6 renders line switch 2 conducting and dialler chip 1 is now powered by current from the exchange line via the line switch and the transmission circuit.

The values of resistors R2 and R3 must be such that on the one hand sufficient current must be available to turn on transistor TR3, and on the other hand limit the current to a magnitude which does not cause excessive battery discharge. Typically, this current should be approximately 1.0 UA.

While the present invention has been described with regard to many particulars it is understood that equivalents may be readily substituted without departing from the scope of the invention.

Claims

The claims defining the invention are as follows:

1. A telephone subset circuit arrangement comprising first and second line terminal means for respectively connecting to conductors of an ex¬ change line, a transmission circuit means connected between said line ter¬ minal means, a line switch means whose switching element is formed by a conductive path of a first controllable semiconductor switch means having a control element coupled to a first output of a control means associated with the transmission circuit means, said switching element being serially in the subset circuit's loop current circuit, said control means having powder terminal means for applying energizing power to enable said control means, wherein energy from a battery means associated with said subset is connected to said power terminal means via a conductive path of a second controllable semiconductor switch means when the subset is in the on-hook mode, and wherein when the subset is In the off-hook mode, hook-switch means render said second controllable semiconductor switch means non¬ conducting thereby disconnecting said battery means from said power termi¬ nal means, and rendering a third controllable semiconductor switch means conducting, said third controllable semiconductor means applying signal means to hook-switch signal input means of said control means, said control means thereupon producing a line switch signal to render said line switch's semiconductor switching element conducting, said power terminal means being thereby coupled via the transmission circuit means to said first and second line terminal means.

2. An arrangement as claimed in claim 1, wherein said second control¬ lable semiconductor switch means comprises a complementary con iguration of a first and a second transistor, the conductive path of the said first transistor connecting energy from said battery means to said power terminal means upon being rendered conducting by said second transistor by current flowing from said battery means connected across a circuit which includes a junction of said second transistor and a resistance means In series there¬ with.

3. An arrangement as claimed in claim 2, wherein when the said subset is in the off-hook mode said hook switch means short circuits said junction of said second transistor and a predetermined part of the resistance means, whereby said second semiconductor switching means is rendered non¬ conducting and, moreover, the current In said circuit increases by a prede¬ termined magnitude to render said third semiconductor switch means conducting.

4. An arrangement as claimed in claim 3, wherein said resistance means comprises at least a first resistance, a second resistance and a third re¬ sistance In series, the distal end of the first resistance being connected to the control element of said second transistor and the distal end of said third resistance being connected to a pole of said battery means, the junc¬ tion of the first resistor and the second resistor being connected to a terminal of said hook-switch means, and the junction of the second resist¬ ance and the third resistance being coupled to the control element of the third controllable semiconductor switch means.

5« An arrangement as claimed in any one of the preceding claims, wherein a capacitive storage means is connected across said power terminal means.

6. A telephone subset circuit arrangement substantially as herein de¬ scribed with reference to the figure of the drawing.