NZ231697A

NZ231697A - Telephone subset: hook switch auxiliary functions

Info

Publication number: NZ231697A
Application number: NZ23169789A
Authority: NZ
Inventors: Ronald Christopher Shaw Fox
Original assignee: Alcatel Australia
Priority date: 1989-12-11
Filing date: 1989-12-11
Publication date: 1992-02-25

Description

<div id="description" class="application article clearfix"> 23 1 6 97 <% Comp^*" ^ccSScaiJor: F;hivi: ;C!SS;.. ;-ubi<>ra*;on {>:■ 2 5 FEB 1992 111 NEW ZEALAND PATENTS ACT 1953 COMPLETE SPECIFICATION "A TELEPHONE SUBSET ARRANGEMENT" of the State of New South Wales, of 252-280 Botany Road, Alexandria, New South Wales, 2015> Australia, hereby declare the Invention for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: 1 X. This invention relates to telephone subsets and in particular to low voltage telephone subsets incorporating a dialler chip and an electronic line switch. The electronic line switch fulfils a number of functions including the hook-switch function, that is, the line switch acts as a hook-switch when a hook-switch control signal is selectively applied to the line switch, a hook-switch control signal being generated when the user brings the subset into the off-hook mode. This control signal may be provided by a ten number rcpctory tone/pulse dialler chip or a microprocessor. In a subset provided with a dialler chip and a conventional mechanical hook-switch, the dialler chip is provided with its operating power from current derived from the exchange battery and drawn over the exchange line through the hook-switch. As soon as the subset is brought into the off-hook mode the hook-switch contacts operate and adequate operating voltage is extended to the dialler chip which is then able to function. In the case of a subset provided with an electronic line switch, however, when such a subset is intially connected to the exchange line, or reconnected after subsequently being un-plugged, the dialler chip is without power because its power source is cut off by the line switch which it controls. Consequently the dialler chip cannot function and the line switch cannot be signalled. 231697 A known method by which the dialler chip of such a subset is provided with power is described in the New Zealand specification of Patent Application No. 223996. This specification disclosed an arrangement wherein a storage 5 capacitor provides a current source for the dialler chip. The arrangement is such that Initially, with the capacitor discharged, upon connexion of the subset's line terminals to the exchange line, current flows via a circuit to cause a first transistor to switch on thereby rendering the subset's 10 electronic line switch conducting. The capacitor is charged via the operated line switch until the voltage level across the capacitor reaches the minimum operation voltage of the dialler chip. A control circuit then switches off the first transistor and hence the line switch. 15 This known arrangement, however, is not satisfactory for providing power to the dialler chip in a low voltage phone, and particularly low voltage phones in parallel, because of the low voltage at the phone line terminals. Another known arrangement for providing power to the 20 dialler chip is a bleed circuit around the line switch to bleed sufficient current from the exchange line in the on-hook mode. With low voltage subsets, particularly parallel low voltage subsets, the bleed current required to power the dialler chips would exceed the allowable on-hook current al-25 lowed by some telecommunication authorities. A solution to the problem of providing power to the dialler chip in the on-hook mode is to provide the power 23 16 97 with a dry cell. An undesirable feature of this solution, however, is the necessity to replace the cell when its capacity falls due to discharge. If the discharge is kept to a minimum, the cell life will be greatly extended. It is therefore an object of the present invention to provide a dry cell switching arrangement for disconnecting a dry cell providing power to the dialler chip of a subset when the subset is in the off-hook mode. The inventive concept of the present invention is to provide a switching arrangement to disconnect a dry cell providing power to the subset's dialler chip during the "off-hook" mode, the arrangement using minimal power. According to the invention there is provided a telephone subset circuit arrangement comprising first and second line terminal means for respectively connecting to conductors of an exchange line, a transmission circuit means connected between said line terminal means, a line switch means whose switching element is formed by a conductive path of a first controllable semi-conductor switch means having a control element coupled to a first output of a control means associated with the transmission circuit means, said switching element being serially in the subset circuit's loop current circuit, said control means having power terminal means for applying energizing power to enable said control means, wherein energy from a battery means associated with said subset is connected to said power terminal means via a conductive path uf a second controllable semiconductor 231697 switch means when the subset is in the on-hook mode, and wherein when the subset is in the off-hook mode, hook-switch means render said second controllable semiconductor switch O means non-conducting thereby disconnecting said battery 5 means from said power terminal means, and rendering a third controllable semiconductor switch means conducting, said n third controllable semiconductor means applying signal means to hook-switch signal input means of said control means, said control means thereupon producing a line switch signal 10 to render said line switch's semiconductor switching element conducting, said power terminal means being thereby coupled via the transmission circuit means to said first and second line terminal means, In order that the invention can be readily understood, 15 an embodiment thereof will now be described in relation to the figure of the drawing. Referring to the drawing there is shown a schematic circuit of part of "a low voltage telephone subset. The circuit comprises a ten number repetory tone/pulse dialler chip 20 1 having a dial pulse output DP, a power terminal VDD, a common voltage rail terminal VSS and a hook switch input HS; an electronic line switch 2 serially connected between the LI line terminal (not shown) and the transmission circuit (TX), and the line switch control transistor TR6; a lithium 25 3V dry cell Bl; a hook switch signal contact HS; a storage capacitor CI connected across VDD and USS; the positive terminal of battery Bl is connected to the emitter element o # 231697 of transistor TR1 whose base element is connected to the common voltage rail via three serially connected resistors Rl, R2 and R3; the collector element of a PNP transistor TR1 is connected to the base element of an NPN transistor 5 TR2 whose emitter is connected to VDD of dialler chip 1; the junction of resistor R2 and R3 Is connected to the base element of an NPN transistor TR3 whose collector is connected to the base element of a PNP transistor TR4 via resistor R5; the collector of PNP transistor TR4 is connected 10 to the base element of an NPN transistor TR5 via resistor R6; the collector of transistor TR5 is connected to HS of dialler chip 1; signal contact HS Is connected across the positive terminal of battery Bl and the junction of resistors Rl and R2; VSS Is coupled to the L2 terminal (not 15 shown) of the subset. In operation, in the on-hook mode, the hook switch signal contacts HS are open and transistor TR1 is turned on by current provided by battery Bl through its emitter/base junction and resistors Rl, R2, R3» Transistor TR2 is turned 20 on by current from battery Bl via the emitter/collector junction of transistor TR2. The collector/emitter junction of transistor TR2 connects the positive terminal of battery Bl to the VDD terminal of dialler chip 1 to maintain the chip's memory. In this condition the dialler chip typically 25 draws 1.0 JJA. Storage capacitor CI is quickly charged by current drawn from battery Bl via the collector/emitter O "—N 6 231697 junction of transistor TR2. The charge on CI maintains the chip's memory during impulse dialling. When the subset is placed in the off-hook mode, signal contacts HS close and effectively shunt transistor TR1 and resistor Rl. Transistor TR1 and TR2 turn off. The current through resistors R2 and R3 Increases causing transistor TR3 to now turn on, which in turn causes transistors TR4 and TR5 to turn on. When transistor TR5 turns on terminal HS of dialler chip 1 is rendered LOW, this causes terminal DP to go HIGH. Terminal DP Is connected to the base element of line switch control transistor TR6 which is turned on by the changed condition on terminal DP. Transistor TR6 renders line switch 2 conducting and dialler chip 1 is now powered by current from the exchange line via the line switch and the transmission circuit. The values of resistors R2 and R3 must be such that on the one hand sufficient current must be available to turn on transistor TR3, and on the other hand limit the current to a magnitude which does not cause excessive battery discharge. Typically, this current should be approximately 1.0 UA. While the present invention has been described with regard to many particulars it is understood that equivalents may be readily substituted without departing from the scope of the invention. </div>

Claims

<div id="claims" class="application article clearfix printTableText"> 2316 97 What we claim is :

1. A telephone subset circuit arrangement comprising first and second line terminal means for respectively connecting to conductors of an exchange line, a transmission circuit means connected between said line terminal means, a line switch means whose switching element is formed by a conductive path of a first controllable semiconductor switch means having a control element coupled to a first output of a control means associated with the transmission circuit means, said switching element being serially in the subset circuit's loop current circuit, said control means having power terminal means for applying energizing power to enable said control means, wherein energy from a battery means associated with said subset is connected to said power terminal means via a conductive path of a second controllable semiconductor switch means when the subset is in the on-hook mode, and wherein when the subset is in the off-hook mode, hook-switch means render said second controllable semiconductor switch means non-conducting thereby disconnecting said battery means from said power terminal means, and rendering a third controllable semiconductor switch means conducting, said third controllable semiconductor means applying signal means to hook-switch signal Input means of said control means, said control means thereupon producing a line switch signal to render said line switch's semiconductor switching element conducting, said power terminal means 8 231697 being thereby coupled via the transmission circuit means to said first and second line terminal means.

2. An arrangement as claimed in claim 1, wherein said second controllable semiconductor switch means comprises a complementary configuration of a first and a second transistor, the conductive path of the said first transistor connecting energy from said battery means to said power terminal means upon being rendered conducting by said second transistor by current flowing from said battery means connected across a circuit which includes a junction of said second transistor and a resistance means in series therewith.

3. An arrangement as claimed in claim 2, wherein when the said subset is in the off-hook mode said hook switch means short circuits said junction of said second transistor and a predetermined part of the resistance means, whereby said second semiconductor switching means is rendered nonconducting and, moreover, the current in said circuit increases by a predetermined magnitude to render said third semiconductor switch means conducting.

4. An arrangement as claimed in claim 3, wherein said resistance means comprises at least a first resistance, a second resistance and a third resistance in series, the distal end of the first resistance being connected to the control element of said second transistor and the distal end of said third resistance being connected to a pole of said battery means, the Junction of the first resistor and the 231697 second resistor being connected to a terminal of said hook-switch means, and the junction of the second resistance and the third resistance being coupled to the control element of the third controllable semiconductor switch means.

5. An arrangement as claimed in any one of the preceding claims, wherein a capacitive storage means Is connected across said power terminal means.

6. A telephone subset circuit arrangement substantially as herein described with reference to the figure of the drawing. STANDARD TELEPHONES AND CABLES PTY. LIMITED {jfM P.M. Conrick Authorized Agent P5/1/1703 </div>