AU3333600A - Vlsi emulator comprising processors and reconfigurable circuits - Google Patents
Vlsi emulator comprising processors and reconfigurable circuitsInfo
- Publication number
- AU3333600A AU3333600A AU33336/00A AU3333600A AU3333600A AU 3333600 A AU3333600 A AU 3333600A AU 33336/00 A AU33336/00 A AU 33336/00A AU 3333600 A AU3333600 A AU 3333600A AU 3333600 A AU3333600 A AU 3333600A
- Authority
- AU
- Australia
- Prior art keywords
- emulator
- vlsi
- processors
- reconfigurable circuits
- reconfigurable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
- G06F30/331—Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR999307 | 1999-03-19 | ||
KR1019990009307A KR100306596B1 (ko) | 1999-03-19 | 1999-03-19 | 프로세서와 재설정가능 칩을 사용한 집적회로 에뮬레이터 |
PCT/KR2000/000229 WO2000057273A1 (en) | 1999-03-19 | 2000-03-17 | Vlsi emulator comprising processors and reconfigurable circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
AU3333600A true AU3333600A (en) | 2000-10-09 |
Family
ID=19577022
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU33336/00A Abandoned AU3333600A (en) | 1999-03-19 | 2000-03-17 | Vlsi emulator comprising processors and reconfigurable circuits |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1080410A1 (ko) |
JP (1) | JP3504572B2 (ko) |
KR (1) | KR100306596B1 (ko) |
AU (1) | AU3333600A (ko) |
WO (1) | WO2000057273A1 (ko) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100392569B1 (ko) * | 2000-10-28 | 2003-07-23 | (주)다이나릿시스템 | 반도체 칩의 논리 기능 검증용 에뮬레이터 장치 및 방법 |
KR100426304B1 (ko) * | 2001-09-17 | 2004-04-08 | 한국전자통신연구원 | 스마트 카드 에뮬레이터 및 그 에뮬레이션 방법 |
EP1452968A4 (en) * | 2001-11-30 | 2010-03-03 | Fujitsu Ten Ltd | DEVELOPMENT DEVICE FOR MICROCOMPUTER LOGIC |
KR100427029B1 (ko) * | 2001-12-29 | 2004-04-14 | 주식회사 하이닉스반도체 | 집적회로의 설계 검증 방법 |
JP2004234530A (ja) | 2003-01-31 | 2004-08-19 | Fujitsu Ten Ltd | マイクロコンピュータのロジック開発装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5329470A (en) * | 1988-12-02 | 1994-07-12 | Quickturn Systems, Inc. | Reconfigurable hardware emulation system |
US5109353A (en) * | 1988-12-02 | 1992-04-28 | Quickturn Systems, Incorporated | Apparatus for emulation of electronic hardware system |
US5355528A (en) * | 1992-10-13 | 1994-10-11 | The Regents Of The University Of California | Reprogrammable CNN and supercomputer |
US5479355A (en) * | 1993-09-14 | 1995-12-26 | Hyduke; Stanley M. | System and method for a closed loop operation of schematic designs with electrical hardware |
US5546562A (en) * | 1995-02-28 | 1996-08-13 | Patel; Chandresh | Method and apparatus to emulate VLSI circuits within a logic simulator |
US5638531A (en) * | 1995-06-07 | 1997-06-10 | International Business Machines Corporation | Multiprocessor integrated circuit with video refresh logic employing instruction/data caching and associated timing synchronization |
US5838948A (en) * | 1995-12-01 | 1998-11-17 | Eagle Design Automation, Inc. | System and method for simulation of computer systems combining hardware and software interaction |
US5841967A (en) * | 1996-10-17 | 1998-11-24 | Quickturn Design Systems, Inc. | Method and apparatus for design verification using emulation and simulation |
-
1999
- 1999-03-19 KR KR1019990009307A patent/KR100306596B1/ko not_active IP Right Cessation
-
2000
- 2000-03-17 WO PCT/KR2000/000229 patent/WO2000057273A1/en not_active Application Discontinuation
- 2000-03-17 AU AU33336/00A patent/AU3333600A/en not_active Abandoned
- 2000-03-17 EP EP00911468A patent/EP1080410A1/en not_active Withdrawn
- 2000-03-21 JP JP2000077517A patent/JP3504572B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100306596B1 (ko) | 2001-09-29 |
JP2000298596A (ja) | 2000-10-24 |
WO2000057273A1 (en) | 2000-09-28 |
JP3504572B2 (ja) | 2004-03-08 |
EP1080410A1 (en) | 2001-03-07 |
KR20000060737A (ko) | 2000-10-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |