AU2939689A - Method for prefetching vector data from memory in a memory system designed for scalar processing - Google Patents

Method for prefetching vector data from memory in a memory system designed for scalar processing

Info

Publication number
AU2939689A
AU2939689A AU29396/89A AU2939689A AU2939689A AU 2939689 A AU2939689 A AU 2939689A AU 29396/89 A AU29396/89 A AU 29396/89A AU 2939689 A AU2939689 A AU 2939689A AU 2939689 A AU2939689 A AU 2939689A
Authority
AU
Australia
Prior art keywords
memory
prefetching
vector data
system designed
scalar processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU29396/89A
Other languages
English (en)
Inventor
David B. Fite Jr.
Tryggve Fossum
Ricky C. Hetherington
Dwight P. Manley
Francis X. Mckeen
John E. Murray
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of AU2939689A publication Critical patent/AU2939689A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8061—Details on data memory access
    • G06F15/8069—Details on data memory access using a cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855—Overlapped cache accessing, e.g. pipeline
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G06F9/3455—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results using stride
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Complex Calculations (AREA)
AU29396/89A 1988-01-11 1989-01-04 Method for prefetching vector data from memory in a memory system designed for scalar processing Abandoned AU2939689A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/142,794 US4888679A (en) 1988-01-11 1988-01-11 Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements
US142794 1988-01-11

Publications (1)

Publication Number Publication Date
AU2939689A true AU2939689A (en) 1989-08-01

Family

ID=22501312

Family Applications (1)

Application Number Title Priority Date Filing Date
AU29396/89A Abandoned AU2939689A (en) 1988-01-11 1989-01-04 Method for prefetching vector data from memory in a memory system designed for scalar processing

Country Status (6)

Country Link
US (1) US4888679A (fr)
EP (1) EP0348495B1 (fr)
AU (1) AU2939689A (fr)
CA (1) CA1317032C (fr)
DE (1) DE68911398T2 (fr)
WO (1) WO1989006397A2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113741567A (zh) * 2021-11-08 2021-12-03 广东省新一代通信与网络创新研究院 矢量加速器及其控制方法、装置

Families Citing this family (116)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6467680A (en) * 1987-09-09 1989-03-14 Hitachi Ltd Vector processor
US5261113A (en) * 1988-01-25 1993-11-09 Digital Equipment Corporation Apparatus and method for single operand register array for vector and scalar data processing operations
JP2614916B2 (ja) * 1988-04-27 1997-05-28 日本電気株式会社 記憶アクセス制御装置
US5210834A (en) * 1988-06-01 1993-05-11 Digital Equipment Corporation High speed transfer of instructions from a master to a slave processor
JPH02109160A (ja) * 1988-10-18 1990-04-20 Japan Atom Energy Res Inst ベクトル計算機用演算装置
US5257394A (en) * 1988-10-18 1993-10-26 Japan Atomic Energy Research Institute Logical expression processing pipeline using pushdown stacks for a vector computer
US5146578A (en) * 1989-05-01 1992-09-08 Zenith Data Systems Corporation Method of varying the amount of data prefetched to a cache memory in dependence on the history of data requests
US5093777A (en) * 1989-06-12 1992-03-03 Bull Hn Information Systems Inc. Method and apparatus for predicting address of a subsequent cache request upon analyzing address patterns stored in separate miss stack
JPH0666056B2 (ja) * 1989-10-12 1994-08-24 甲府日本電気株式会社 情報処理システム
US5197140A (en) * 1989-11-17 1993-03-23 Texas Instruments Incorporated Sliced addressing multi-processor and method of operation
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
US5623650A (en) * 1989-12-29 1997-04-22 Cray Research, Inc. Method of processing a sequence of conditional vector IF statements
JP3018038B2 (ja) * 1990-01-18 2000-03-13 三菱電機株式会社 キャッシュを有するデータ処理装置
JP2825906B2 (ja) * 1990-02-01 1998-11-18 株式会社日立製作所 計算機システム
US5261066A (en) * 1990-03-27 1993-11-09 Digital Equipment Corporation Data processing system and method with small fully-associative cache and prefetch buffers
US5598547A (en) * 1990-06-11 1997-01-28 Cray Research, Inc. Vector processor having functional unit paths of differing pipeline lengths
JPH0452741A (ja) * 1990-06-14 1992-02-20 Toshiba Corp キャッシュメモリ装置
US5263144A (en) * 1990-06-29 1993-11-16 Digital Equipment Corporation Method and apparatus for sharing data between processors in a computer system
EP0471462B1 (fr) * 1990-08-06 1998-04-15 NCR International, Inc. Procédé de fonctionnement d'une mémoire d'ordinateur et système
DE69130967T2 (de) * 1990-08-06 1999-10-21 Ncr International, Inc. Rechnerspeicheranordnung
GB2247546B (en) * 1990-08-31 1995-03-01 Sun Microsystems Inc Method and apparatus for predictive caching
US5724548A (en) * 1990-09-18 1998-03-03 Fujitsu Limited System including processor and cache memory and method of controlling the cache memory
JP2718254B2 (ja) * 1990-10-02 1998-02-25 日本電気株式会社 ベクトル処理装置
RU1804645C (ru) * 1991-03-27 1993-03-23 Институт Точной Механики И Вычислительной Техники Им.С.А.Лебедева Центральный процессор
US5357618A (en) * 1991-04-15 1994-10-18 International Business Machines Corporation Cache prefetch and bypass using stride registers
US5625793A (en) * 1991-04-15 1997-04-29 International Business Machines Corporation Automatic cache bypass for instructions exhibiting poor cache hit ratio
US5293603A (en) * 1991-06-04 1994-03-08 Intel Corporation Cache subsystem for microprocessor based computer system with synchronous and asynchronous data path
US5333291A (en) * 1991-06-14 1994-07-26 International Business Machines Corporation Stride enhancer for high speed memory accesses with line fetching mode and normal mode employing boundary crossing determination
JP3204323B2 (ja) * 1991-07-05 2001-09-04 エヌイーシーマイクロシステム株式会社 キャッシュメモリ内蔵マイクロプロセッサ
EP0543652B1 (fr) * 1991-11-19 1998-10-28 Fujitsu Limited Dispositif d'accès à une mémoire
US5742842A (en) * 1992-01-28 1998-04-21 Fujitsu Limited Data processing apparatus for executing a vector operation under control of a master processor
US5423016A (en) * 1992-02-24 1995-06-06 Unisys Corporation Block buffer for instruction/operand caches
US5379393A (en) * 1992-05-14 1995-01-03 The Board Of Governors For Higher Education, State Of Rhode Island And Providence Plantations Cache memory system for vector processing
US5381539A (en) * 1992-06-04 1995-01-10 Emc Corporation System and method for dynamically controlling cache management
US5418973A (en) * 1992-06-22 1995-05-23 Digital Equipment Corporation Digital computer system with cache controller coordinating both vector and scalar operations
JP3304444B2 (ja) * 1992-11-30 2002-07-22 富士通株式会社 ベクトル処理装置
US5440687A (en) * 1993-01-29 1995-08-08 International Business Machines Corporation Communication protocol for handling arbitrarily varying data strides in a distributed processing environment
DE69424370T2 (de) 1993-11-05 2001-02-15 Intergraph Corp., Huntsville Befehlscachespeicher mit Kreuzschienenschalter
US5634025A (en) * 1993-12-09 1997-05-27 International Business Machines Corporation Method and system for efficiently fetching variable-width instructions in a data processing system having multiple prefetch units
US5881302A (en) * 1994-05-31 1999-03-09 Nec Corporation Vector processing unit with reconfigurable data buffer
JP2752902B2 (ja) * 1994-05-31 1998-05-18 甲府日本電気株式会社 ベクトル処理装置
JPH0877143A (ja) * 1994-09-02 1996-03-22 Kofu Nippon Denki Kk ベクトルデータ処理装置
DE69535330T2 (de) * 1994-09-14 2007-05-31 Intel Corporation, Santa Clara Caching-System mit Explitzer Folgeliste
US5890222A (en) * 1995-01-04 1999-03-30 International Business Machines Corporation Method and system for addressing registers in a data processing unit in an indirect addressing mode
US5680338A (en) * 1995-01-04 1997-10-21 International Business Machines Corporation Method and system for vector processing utilizing selected vector elements
US5832533A (en) * 1995-01-04 1998-11-03 International Business Machines Corporation Method and system for addressing registers in a data processing unit in an indexed addressing mode
US5887183A (en) * 1995-01-04 1999-03-23 International Business Machines Corporation Method and system in a data processing system for loading and storing vectors in a plurality of modes
JP3548616B2 (ja) * 1995-01-20 2004-07-28 株式会社日立製作所 情報処理装置
US5689653A (en) * 1995-02-06 1997-11-18 Hewlett-Packard Company Vector memory operations
US5724533A (en) * 1995-11-17 1998-03-03 Unisys Corporation High performance instruction data path
US5663924A (en) * 1995-12-14 1997-09-02 International Business Machines Corporation Boundary independent bit decode for a SDRAM
US6131140A (en) * 1995-12-22 2000-10-10 Cypress Semiconductor Corp. Integrated cache memory with system control logic and adaptation of RAM bus to a cache pinout
US5829031A (en) * 1996-02-23 1998-10-27 Advanced Micro Devices, Inc. Microprocessor configured to detect a group of instructions and to perform a specific function upon detection
US5802564A (en) * 1996-07-08 1998-09-01 International Business Machines Corp. Method and apparatus for increasing processor performance
US5652774A (en) * 1996-07-08 1997-07-29 International Business Machines Corporation Method and apparatus for decreasing the cycle times of a data processing system
KR100280285B1 (ko) 1996-08-19 2001-02-01 윤종용 멀티미디어 신호에 적합한 멀티미디어 프로세서
US5924117A (en) * 1996-12-16 1999-07-13 International Business Machines Corporation Multi-ported and interleaved cache memory supporting multiple simultaneous accesses thereto
US6243822B1 (en) 1997-12-24 2001-06-05 Elbrus International Limited Method and system for asynchronous array loading
US6247107B1 (en) * 1998-04-06 2001-06-12 Advanced Micro Devices, Inc. Chipset configured to perform data-directed prefetching
US6334176B1 (en) * 1998-04-17 2001-12-25 Motorola, Inc. Method and apparatus for generating an alignment control vector
US6202130B1 (en) * 1998-04-17 2001-03-13 Motorola, Inc. Data processing system for processing vector data and method therefor
US6282634B1 (en) * 1998-05-27 2001-08-28 Arm Limited Apparatus and method for processing data having a mixed vector/scalar register file
US6292845B1 (en) * 1998-08-26 2001-09-18 Infineon Technologies North America Corp. Processing unit having independent execution units for parallel execution of instructions of different category with instructions having specific bits indicating instruction size and category respectively
US6496902B1 (en) * 1998-12-31 2002-12-17 Cray Inc. Vector and scalar data cache for a vector multiprocessor
US6311280B1 (en) * 1999-02-22 2001-10-30 Nband Communications Low-power memory system with incorporated vector processing
US6088784A (en) * 1999-03-30 2000-07-11 Sandcraft, Inc. Processor with multiple execution units and local and global register bypasses
US6665749B1 (en) * 1999-08-17 2003-12-16 Nec Electronics, Inc. Bus protocol for efficiently transferring vector data
US6665790B1 (en) * 2000-02-29 2003-12-16 International Business Machines Corporation Vector register file with arbitrary vector addressing
US6760816B1 (en) * 2000-09-29 2004-07-06 Intel Corporation Critical loads guided data prefetching
US6782469B1 (en) 2000-09-29 2004-08-24 Intel Corporation Runtime critical load/data ordering
US6662273B1 (en) 2000-09-29 2003-12-09 Intel Corporation Least critical used replacement with critical cache
US6591345B1 (en) * 2000-11-28 2003-07-08 Hewlett-Packard Development Company, L.P. Method for ensuring maximum bandwidth on accesses to strided vectors in a bank-interleaved cache
US6996739B2 (en) * 2001-07-11 2006-02-07 Sun Microsystems, Inc. Accumulator memory for performing operations on block operands
US7234022B2 (en) * 2001-12-19 2007-06-19 Sun Microsystems, Inc. Cache accumulator memory for performing operations on block operands
US20030115416A1 (en) * 2001-12-19 2003-06-19 Nixon Walter T. Cache accumulator memory with an associativity mechanism
GB2390700B (en) * 2002-04-15 2006-03-15 Alphamosaic Ltd Narrow/wide cache
US7577816B2 (en) * 2003-08-18 2009-08-18 Cray Inc. Remote translation mechanism for a multinode system
US8307194B1 (en) 2003-08-18 2012-11-06 Cray Inc. Relaxed memory consistency model
US7437521B1 (en) 2003-08-18 2008-10-14 Cray Inc. Multistream processing memory-and barrier-synchronization method and apparatus
US7735088B1 (en) 2003-08-18 2010-06-08 Cray Inc. Scheduling synchronization of programs running as streams on multiple processors
US7366873B1 (en) 2003-08-18 2008-04-29 Cray, Inc. Indirectly addressed vector load-operate-store method and apparatus
US7543133B1 (en) * 2003-08-18 2009-06-02 Cray Inc. Latency tolerant distributed shared memory multiprocessor computer
US7334110B1 (en) 2003-08-18 2008-02-19 Cray Inc. Decoupled scalar/vector computer architecture system and method
US7519771B1 (en) 2003-08-18 2009-04-14 Cray Inc. System and method for processing memory instructions using a forced order queue
US7743223B2 (en) * 2003-08-18 2010-06-22 Cray Inc. Decoupling of write address from its associated write data in a store to a shared memory in a multiprocessor system
US7421565B1 (en) 2003-08-18 2008-09-02 Cray Inc. Method and apparatus for indirectly addressed vector load-add -store across multi-processors
US7503048B1 (en) 2003-08-18 2009-03-10 Cray Incorporated Scheduling synchronization of programs running as streams on multiple processors
US7555703B2 (en) * 2004-06-17 2009-06-30 Intel Corporation Method and apparatus for reducing false error detection in a microprocessor
US7386756B2 (en) * 2004-06-17 2008-06-10 Intel Corporation Reducing false error detection in a microprocessor by tracking instructions neutral to errors
US7478769B1 (en) 2005-03-09 2009-01-20 Cray Inc. Method and apparatus for cooling electronic components
EP1873648B1 (fr) * 2006-06-28 2010-08-18 STMicroelectronics Srl Procédé et aménagement de gestion d'antémémoire, architecture du processeur concerné
US8683139B2 (en) 2006-10-31 2014-03-25 Hewlett-Packard Development Company, L.P. Cache and method for cache bypass functionality
US9710384B2 (en) * 2008-01-04 2017-07-18 Micron Technology, Inc. Microprocessor architecture having alternative memory access paths
US8972958B1 (en) 2012-10-23 2015-03-03 Convey Computer Multistage development workflow for generating a custom instruction set reconfigurable processor
US7984273B2 (en) 2007-12-31 2011-07-19 Intel Corporation System and method for using a mask register to track progress of gathering elements from memory
JP4687729B2 (ja) * 2008-03-04 2011-05-25 日本電気株式会社 キャッシュメモリ及びベクトル処理装置並びにベクトルデータ整列方法
US8904153B2 (en) 2010-09-07 2014-12-02 International Business Machines Corporation Vector loads with multiple vector elements from a same cache line in a scattered load operation
US8635431B2 (en) 2010-12-08 2014-01-21 International Business Machines Corporation Vector gather buffer for multiple address vector loads
US8850162B2 (en) 2012-05-22 2014-09-30 Apple Inc. Macroscalar vector prefetch with streaming access detection
US10430190B2 (en) 2012-06-07 2019-10-01 Micron Technology, Inc. Systems and methods for selectively controlling multithreaded execution of executable code segments
US9785436B2 (en) * 2012-09-28 2017-10-10 Intel Corporation Apparatus and method for efficient gather and scatter operations
US10585801B2 (en) * 2012-11-26 2020-03-10 Advanced Micro Devices, Inc. Prefetch kernels on a graphics processing unit
WO2014107148A1 (fr) 2013-01-03 2014-07-10 Intel Corporation Pré-extraction adaptative de données
KR102202575B1 (ko) 2013-12-31 2021-01-13 삼성전자주식회사 메모리 관리 방법 및 장치
US9639472B2 (en) 2014-07-15 2017-05-02 International Business Machines Corporation Prefetch list management in a computer system
US10762164B2 (en) 2016-01-20 2020-09-01 Cambricon Technologies Corporation Limited Vector and matrix computing device
CN107704433A (zh) * 2016-01-20 2018-02-16 南京艾溪信息科技有限公司 一种矩阵运算指令及其方法
WO2017181419A1 (fr) * 2016-04-22 2017-10-26 北京中科寒武纪科技有限公司 Dispositif et procédé d'opération de sous-matrice
CN111651203B (zh) 2016-04-26 2024-05-07 中科寒武纪科技股份有限公司 一种用于执行向量四则运算的装置和方法
CN111651205B (zh) * 2016-04-26 2023-11-17 中科寒武纪科技股份有限公司 一种用于执行向量内积运算的装置和方法
CN107315715B (zh) 2016-04-26 2020-11-03 中科寒武纪科技股份有限公司 一种用于执行矩阵加/减运算的装置和方法
WO2019005169A1 (fr) * 2017-06-30 2019-01-03 Intel Corporation Appareil et procédé destinés à des opérations de mémoire prête pour les données
US11500779B1 (en) * 2019-07-19 2022-11-15 Marvell Asia Pte, Ltd. Vector prefetching for computing systems
US11379379B1 (en) 2019-12-05 2022-07-05 Marvell Asia Pte, Ltd. Differential cache block sizing for computing systems
TWI762852B (zh) * 2020-01-03 2022-05-01 瑞昱半導體股份有限公司 記憶體裝置及其操作方法
CN113110878A (zh) * 2020-01-09 2021-07-13 瑞昱半导体股份有限公司 存储器装置及其操作方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4583165A (en) * 1982-06-30 1986-04-15 International Business Machines Corporation Apparatus and method for controlling storage access in a multilevel storage system
US4594682A (en) * 1982-12-22 1986-06-10 Ibm Corporation Vector processing
US4620275A (en) * 1984-06-20 1986-10-28 Wallach Steven J Computer system
US4771380A (en) * 1984-06-22 1988-09-13 International Business Machines Corp. Virtual vector registers for vector processing system
US4760518A (en) * 1986-02-28 1988-07-26 Scientific Computer Systems Corporation Bi-directional databus system for supporting superposition of vector and scalar operations in a computer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113741567A (zh) * 2021-11-08 2021-12-03 广东省新一代通信与网络创新研究院 矢量加速器及其控制方法、装置
CN113741567B (zh) * 2021-11-08 2022-03-29 广东省新一代通信与网络创新研究院 矢量加速器及其控制方法、装置

Also Published As

Publication number Publication date
EP0348495A1 (fr) 1990-01-03
DE68911398T2 (de) 1994-06-09
WO1989006397A2 (fr) 1989-07-13
US4888679A (en) 1989-12-19
CA1317032C (fr) 1993-04-27
EP0348495B1 (fr) 1993-12-15
DE68911398D1 (de) 1994-01-27
WO1989006397A3 (fr) 1989-08-10

Similar Documents

Publication Publication Date Title
AU2939689A (en) Method for prefetching vector data from memory in a memory system designed for scalar processing
US5179654C1 (en) Help provision in a data processing system
GB9320982D0 (en) A data processing system
EP0510908A3 (en) System and method for generating a data processing system
EP0646877A3 (fr) Système d'ordinateur et méthode pour le traitement de données vectorielles.
EP0442839A3 (en) Method for providing user access control within a distributed data processing system
GB2277389B (en) Data processing system
EP0466626A3 (en) Method for document type transformation in a data processing system
GB2217067B (en) Data processing system
EP0505179A3 (en) A parallel data processing system
GB2220509B (en) Data processing system
GB9123264D0 (en) Semaphone arrangement for a data processing system
HK1010765A1 (en) Music data processing system
GB9511234D0 (en) A data processing system
AU1971992A (en) Method and apparatus for upgrading a computer processing system
AU3136189A (en) A method for processing seismic data
GB8808353D0 (en) Data processing system
EP0450522A3 (en) A learning method for a data processing system
GB9500252D0 (en) A system and method for processing parallel data queries
GB9419103D0 (en) A data processing system
EP0447341A3 (en) Method for document distribution control in a data processing system
EP0501494A3 (en) Shape data processing method
ZA94105B (en) Data processing system
GB9322583D0 (en) A process control data processing apparatus
GB2303948B (en) A data processing system