AU2294100A - Packaging for a semiconductor chip - Google Patents

Packaging for a semiconductor chip

Info

Publication number
AU2294100A
AU2294100A AU22941/00A AU2294100A AU2294100A AU 2294100 A AU2294100 A AU 2294100A AU 22941/00 A AU22941/00 A AU 22941/00A AU 2294100 A AU2294100 A AU 2294100A AU 2294100 A AU2294100 A AU 2294100A
Authority
AU
Australia
Prior art keywords
packaging
semiconductor chip
chip
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU22941/00A
Inventor
Gerold Klotzig
Jorg Ludewig
Werner Schneider
Kay Schone
Gregor Woldt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WICHMANN WORKX AG INFORMATION TECHNOLOGY
First Sensor Microelectronic Packaging GmbH
Original Assignee
WICHMANN WORKX AG INFORMATION
Microelectronic Packaging Dresden GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE29902754U external-priority patent/DE29902754U1/en
Application filed by WICHMANN WORKX AG INFORMATION, Microelectronic Packaging Dresden GmbH filed Critical WICHMANN WORKX AG INFORMATION
Publication of AU2294100A publication Critical patent/AU2294100A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2924/30107Inductance

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
AU22941/00A 1999-02-16 2000-01-28 Packaging for a semiconductor chip Abandoned AU2294100A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE29902754 1999-02-16
DE29902754U DE29902754U1 (en) 1998-02-20 1999-02-16 Package for a semiconductor chip
PCT/EP2000/000678 WO2000048444A2 (en) 1999-02-16 2000-01-28 Packaging for a semiconductor chip

Publications (1)

Publication Number Publication Date
AU2294100A true AU2294100A (en) 2000-09-04

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AU22941/00A Abandoned AU2294100A (en) 1999-02-16 2000-01-28 Packaging for a semiconductor chip

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AU (1) AU2294100A (en)
WO (1) WO2000048444A2 (en)

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* Cited by examiner, † Cited by third party
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