AU2019215340B2 - RQL majority gates, and gates, and or gates - Google Patents
RQL majority gates, and gates, and or gates Download PDFInfo
- Publication number
- AU2019215340B2 AU2019215340B2 AU2019215340A AU2019215340A AU2019215340B2 AU 2019215340 B2 AU2019215340 B2 AU 2019215340B2 AU 2019215340 A AU2019215340 A AU 2019215340A AU 2019215340 A AU2019215340 A AU 2019215340A AU 2019215340 B2 AU2019215340 B2 AU 2019215340B2
- Authority
- AU
- Australia
- Prior art keywords
- logical
- input
- storage
- output
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/44—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
- H03K19/23—Majority or minority circuits, i.e. giving output having the state of the majority or the minority of the inputs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
- H10N60/12—Josephson-effect devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/886,626 US10084454B1 (en) | 2018-02-01 | 2018-02-01 | RQL majority gates, and gates, and or gates |
US15/886,626 | 2018-02-01 | ||
PCT/US2019/015228 WO2019152280A1 (en) | 2018-02-01 | 2019-01-25 | Rql majority gates, and gates, and or gates |
Publications (2)
Publication Number | Publication Date |
---|---|
AU2019215340A1 AU2019215340A1 (en) | 2020-07-16 |
AU2019215340B2 true AU2019215340B2 (en) | 2021-04-15 |
Family
ID=63557143
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2019215340A Active AU2019215340B2 (en) | 2018-02-01 | 2019-01-25 | RQL majority gates, and gates, and or gates |
Country Status (7)
Country | Link |
---|---|
US (1) | US10084454B1 (ja) |
EP (1) | EP3747128A1 (ja) |
JP (1) | JP7050160B2 (ja) |
KR (1) | KR102374648B1 (ja) |
AU (1) | AU2019215340B2 (ja) |
CA (1) | CA3087681C (ja) |
WO (1) | WO2019152280A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10756712B2 (en) | 2017-11-13 | 2020-08-25 | Northrop Grumman Systems Corporation | RQL phase-mode flip-flop |
US10103736B1 (en) * | 2018-02-01 | 2018-10-16 | Northrop Gumman Systems Corporation | Four-input Josephson gates |
US10554207B1 (en) | 2018-07-31 | 2020-02-04 | Northrop Grumman Systems Corporation | Superconducting non-destructive readout circuits |
US10374610B1 (en) * | 2018-09-13 | 2019-08-06 | Microsoft Technology Licensing, Llc | Reciprocal quantum logic based circuits for an A-and-not-B gate |
US10885974B2 (en) | 2019-01-30 | 2021-01-05 | Northrop Grumman Systems Corporation | Superconducting switch |
US11201608B2 (en) | 2020-04-24 | 2021-12-14 | Northrop Grumman Systems Corporation | Superconducting latch system |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030011398A1 (en) * | 2001-06-15 | 2003-01-16 | Herr Quentin P. | Combinational logic using asynchronous single-flux quantum gates |
Family Cites Families (31)
Publication number | Priority date | Publication date | Assignee | Title |
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US3094685A (en) | 1957-09-30 | 1963-06-18 | Ibm | Non-destructive readout system |
JP2700649B2 (ja) * | 1987-11-24 | 1998-01-21 | 科学技術振興事業団 | 超伝導アナログ・デジタル変換器 |
JP2802446B2 (ja) * | 1989-11-27 | 1998-09-24 | 科学技術振興事業団 | 超電導論理回路 |
US5233243A (en) | 1991-08-14 | 1993-08-03 | Westinghouse Electric Corp. | Superconducting push-pull flux quantum logic circuits |
JP2971066B1 (ja) * | 1998-12-02 | 1999-11-02 | 株式会社日立製作所 | 超電導単一磁束量子論理回路 |
US6734699B1 (en) | 1999-07-14 | 2004-05-11 | Northrop Grumman Corporation | Self-clocked complementary logic |
JP2002344306A (ja) * | 2001-05-17 | 2002-11-29 | Seiko Instruments Inc | 単一磁束量子理論に基づく論理ゲート |
JP3806619B2 (ja) | 2001-06-15 | 2006-08-09 | 株式会社日立製作所 | 超電導単一磁束量子回路 |
US6756925B1 (en) * | 2003-04-18 | 2004-06-29 | Northrop Grumman Corporation | PSK RSFQ output interface |
JP4113076B2 (ja) * | 2003-08-28 | 2008-07-02 | 株式会社日立製作所 | 超電導半導体集積回路 |
JP4690791B2 (ja) * | 2005-06-22 | 2011-06-01 | 株式会社日立製作所 | 電流信号入力型単一磁束量子回路 |
US7443719B2 (en) | 2006-02-23 | 2008-10-28 | Hypres, Inc. | Superconducting circuit for high-speed lookup table |
US7554369B2 (en) * | 2005-10-04 | 2009-06-30 | Hypres, Inc. | Digital programmable frequency divider |
EP2100376B1 (en) | 2007-01-18 | 2018-01-10 | Northrop Grumman Systems Corporation | Single flux quantum circuits |
US7724020B2 (en) | 2007-12-13 | 2010-05-25 | Northrop Grumman Systems Corporation | Single flux quantum circuits |
US7969178B2 (en) * | 2008-05-29 | 2011-06-28 | Northrop Grumman Systems Corporation | Method and apparatus for controlling qubits with single flux quantum logic |
EP2304550A2 (en) * | 2008-06-03 | 2011-04-06 | D-Wave Systems Inc. | Systems, methods and apparatus for superconducting demultiplexer circuits |
US7786748B1 (en) | 2009-05-15 | 2010-08-31 | Northrop Grumman Systems Corporation | Method and apparatus for signal inversion in superconducting logic gates |
US8489163B2 (en) * | 2011-08-12 | 2013-07-16 | Northrop Grumman Systems Corporation | Superconducting latch system |
CA2952922C (en) * | 2014-07-08 | 2019-05-21 | Northrop Grumman Systems Corporation | Superconductive gate system |
US9780765B2 (en) | 2014-12-09 | 2017-10-03 | Northrop Grumman Systems Corporation | Josephson current source systems and method |
US9768771B2 (en) | 2015-02-06 | 2017-09-19 | Northrop Grumman Systems Corporation | Superconducting single-pole double-throw switch system |
US9905900B2 (en) | 2015-05-01 | 2018-02-27 | Northrop Grumman Systems Corporation | Superconductor circuits with active termination |
US9712172B2 (en) * | 2015-10-07 | 2017-07-18 | Microsoft Technology Licensing, Llc | Devices with an array of superconducting logic cells |
US9543959B1 (en) * | 2015-10-21 | 2017-01-10 | Microsoft Technology Licensing, Llc | Phase-mode based superconducting logic |
US9595970B1 (en) | 2016-03-24 | 2017-03-14 | Northrop Grumman Systems Corporation | Superconducting cell array logic circuit system |
US9646682B1 (en) | 2016-05-27 | 2017-05-09 | Northrop Grumman Systems Corporation | Reciprocal quantum logic (RQL) sense amplifier |
US9998122B2 (en) | 2016-06-08 | 2018-06-12 | Auburn University | Superconducting quantum logic and applications of same |
US9972380B2 (en) | 2016-07-24 | 2018-05-15 | Microsoft Technology Licensing, Llc | Memory cell having a magnetic Josephson junction device with a doped magnetic layer |
US9812192B1 (en) | 2016-09-02 | 2017-11-07 | Northrop Grumman Systems Corporation | Superconducting gate memory circuit |
US9876505B1 (en) | 2016-09-02 | 2018-01-23 | Northrop Grumman Systems Corporation | Superconducting isochronous receiver system |
-
2018
- 2018-02-01 US US15/886,626 patent/US10084454B1/en active Active
-
2019
- 2019-01-25 CA CA3087681A patent/CA3087681C/en active Active
- 2019-01-25 JP JP2020540752A patent/JP7050160B2/ja active Active
- 2019-01-25 WO PCT/US2019/015228 patent/WO2019152280A1/en unknown
- 2019-01-25 AU AU2019215340A patent/AU2019215340B2/en active Active
- 2019-01-25 KR KR1020207022289A patent/KR102374648B1/ko active IP Right Grant
- 2019-01-25 EP EP19705271.5A patent/EP3747128A1/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030011398A1 (en) * | 2001-06-15 | 2003-01-16 | Herr Quentin P. | Combinational logic using asynchronous single-flux quantum gates |
Non-Patent Citations (1)
Title |
---|
Maezawa, M., et al., "Pulse-Driven Dual-Rail Logic Gate Family Based on Rapid Single-Flux- Quantum (RSFQ) Devices for Asynchronous Circuits", Proceedings of ASYNC 1996 * |
Also Published As
Publication number | Publication date |
---|---|
KR20200102503A (ko) | 2020-08-31 |
EP3747128A1 (en) | 2020-12-09 |
JP7050160B2 (ja) | 2022-04-07 |
AU2019215340A1 (en) | 2020-07-16 |
CA3087681A1 (en) | 2019-08-08 |
CA3087681C (en) | 2023-01-31 |
WO2019152280A1 (en) | 2019-08-08 |
KR102374648B1 (ko) | 2022-03-15 |
JP2021513236A (ja) | 2021-05-20 |
US10084454B1 (en) | 2018-09-25 |
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AU2019215340B2 (en) | RQL majority gates, and gates, and or gates | |
AU2018364955B2 (en) | Large fan-in RQL gates | |
AU2018364956B2 (en) | Inverting phase mode logic gates | |
CA3077219C (en) | Josephson and/or gate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FGA | Letters patent sealed or granted (standard patent) |