AU2002360486A1 - Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core - Google Patents

Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core Download PDF

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Publication number
AU2002360486A1
AU2002360486A1 AU2002360486A AU2002360486A AU2002360486A1 AU 2002360486 A1 AU2002360486 A1 AU 2002360486A1 AU 2002360486 A AU2002360486 A AU 2002360486A AU 2002360486 A AU2002360486 A AU 2002360486A AU 2002360486 A1 AU2002360486 A1 AU 2002360486A1
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AU
Australia
Prior art keywords
coupled
computer system
processor element
processor
dual
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
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AU2002360486A
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English (en)
Inventor
Jon M. Huppenthal
Denis O Kellam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SRC Computers LLC
Original Assignee
SRC Computers LLC
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Filing date
Publication date
Application filed by SRC Computers LLC filed Critical SRC Computers LLC
Publication of AU2002360486A1 publication Critical patent/AU2002360486A1/en
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Logic Circuits (AREA)
AU2002360486A 2002-05-09 2002-12-03 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core Abandoned AU2002360486A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/142,045 US20030212853A1 (en) 2002-05-09 2002-05-09 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core
US10/142,045 2002-05-09
PCT/US2002/038844 WO2003096195A1 (en) 2002-05-09 2002-12-03 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core

Publications (1)

Publication Number Publication Date
AU2002360486A1 true AU2002360486A1 (en) 2003-11-11

Family

ID=29399794

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002360486A Abandoned AU2002360486A1 (en) 2002-05-09 2002-12-03 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core

Country Status (6)

Country Link
US (2) US20030212853A1 (https=)
EP (1) EP1502190A1 (https=)
JP (1) JP2005524906A (https=)
AU (1) AU2002360486A1 (https=)
CA (1) CA2483541A1 (https=)
WO (1) WO2003096195A1 (https=)

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JP4571454B2 (ja) * 2004-07-16 2010-10-27 株式会社アドバンテスト 半導体集積回路
DE602005009801D1 (de) * 2005-04-11 2008-10-30 St Microelectronics Srl Ein dynamisch rekonfigurierbares System auf einem Chip, welches eine Vielzahl rekonfigurierbarer Gate-Arrays beinhaltet.
WO2008061162A1 (en) * 2006-11-14 2008-05-22 Star Bridge Systems, Inc. Hybrid computing platform having fpga components with embedded processors
US8332610B2 (en) * 2007-04-17 2012-12-11 Marvell World Trade Ltd. System on chip with reconfigurable SRAM
CN102799559B (zh) * 2012-07-27 2015-12-02 浪潮(北京)电子信息产业有限公司 一种验证系统和拓扑结构的建立方法
CN103419201B (zh) * 2013-08-19 2015-07-08 电子科技大学 基于fpga的多指节机器人控制系统及其控制方法
JP6205654B2 (ja) 2015-04-07 2017-10-04 エスゼット ディージェイアイ テクノロジー カンパニー リミテッドＳｚ Ｄｊｉ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏ．，Ｌｔｄ 画像処理方法及び画像処理装置
CN106648507B (zh) * 2016-12-05 2020-02-14 中国航空工业集团公司洛阳电光设备研究所 一种用于嵌入式处理器扩展dvi显示输出的电路及方法
TWI638442B (zh) * 2017-05-26 2018-10-11 瑞昱半導體股份有限公司 電子裝置及其電路基板
CN108776644B (zh) * 2018-05-04 2022-09-27 中国电子科技集团公司第三十六研究所 一种数据高速缓存系统、方法和航天用电子设备
CN110059049A (zh) * 2019-03-27 2019-07-26 中国计量大学上虞高等研究院有限公司 一种实时存储装置
CN112068467B (zh) * 2020-08-24 2022-01-14 国微集团(深圳)有限公司 数据传输系统、数据存储系统
CN113569525B (zh) * 2021-06-24 2024-07-23 合肥松豪电子科技有限公司 一种利用sram在fpga验证平台上的验证模型及方法
US12430270B1 (en) * 2024-11-26 2025-09-30 Texas Milkyway Inc. Multi-port SRAM system for a distributed memory pool

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US5802290A (en) * 1992-07-29 1998-09-01 Virtual Computer Corporation Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed
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Also Published As

Publication number Publication date
WO2003096195A1 (en) 2003-11-20
US20050257029A1 (en) 2005-11-17
CA2483541A1 (en) 2003-11-20
EP1502190A1 (en) 2005-02-02
JP2005524906A (ja) 2005-08-18
US20030212853A1 (en) 2003-11-13

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Legal Events

Date Code Title Description
MK1 Application lapsed section 142(2)(a) - no request for examination in relevant period
TH Corrigenda

Free format text: IN VOL 18, NO 2, PAGE(S) 588 UNDER THE HEADING APPLICATIONS OPI NAME INDEX UNDER THE NAME SRC COMPUTERS, INC., APPLICATION NO. 2002360486, UNDER INID (43) CORRECT THE PUBLICATION DATE TO READ 24.11.2003