AU2001296719A1 - Microelectronic substrate with integrated devices - Google Patents

Microelectronic substrate with integrated devices

Info

Publication number
AU2001296719A1
AU2001296719A1 AU2001296719A AU9671901A AU2001296719A1 AU 2001296719 A1 AU2001296719 A1 AU 2001296719A1 AU 2001296719 A AU2001296719 A AU 2001296719A AU 9671901 A AU9671901 A AU 9671901A AU 2001296719 A1 AU2001296719 A1 AU 2001296719A1
Authority
AU
Australia
Prior art keywords
microelectronic
microelectronic substrate
integrated devices
opening
encapsulation material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001296719A
Inventor
Jian Li
Steven Towle
Quat Vu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU2001296719A1 publication Critical patent/AU2001296719A1/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L21/568Temporary substrate used as encapsulation process aid
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

Abstract

A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality microelectronic dice encapsulated without the microelectronic substrate core. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate.
AU2001296719A 2000-10-19 2001-10-09 Microelectronic substrate with integrated devices Abandoned AU2001296719A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/692,908 2000-10-19
US09/692,908 US6734534B1 (en) 2000-08-16 2000-10-19 Microelectronic substrate with integrated devices
PCT/US2001/031438 WO2002033751A2 (en) 2000-10-19 2001-10-09 Microelectronic substrate with integrated devices

Publications (1)

Publication Number Publication Date
AU2001296719A1 true AU2001296719A1 (en) 2002-04-29

Family

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Family Applications (1)

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AU2001296719A Abandoned AU2001296719A1 (en) 2000-10-19 2001-10-09 Microelectronic substrate with integrated devices

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EP1356520A2 (en) 2003-10-29
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ATE438925T1 (en) 2009-08-15
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